OK, I need to clarify some things.
1. in the past I started down this path and discovered after I had made some PCBs that would do a similar job that I used the wrong footprint for the CPU so I abandoned it after considerable expense. I have done better this time.
2. The options I have described are the ones I can make with the same PCB and are in the order that are easiest to make (ie require the least amount of work first). The earlier options do not have the CPU soldered on so there really is no upgrade path without replacing the hardware (PCB). If I run out of time c & d may be a long way down the track.
3. The difference between a and b is that an additional FLASH chip is soldered on the board, and a slightly different CPLD program. I could make the CPLD program identical so that someone could solder their own FLASH chip on to "upgrade" an 'a' to a 'b' But it costs me about $20 to get the chip and do that so I don't see how it would be much cheaper for anyone else.
4. The options for a and b were because someone told me that $US200 was too much for something like this and therefore I have provided cheaper options so that those who wanted the functionality (limited as it is) without the expense could opt in somehow.
5. When you have a CPU based board, the mechanism for changing the banks visible to the P2K will be by playing a note using a special (dummy) preset rather than through jumpers. You will still need to reset the system for the change to have an effect but there is no need to open the box or have a hole in the side.
6. On a non-turbo device (ie P1K and other 64 voice systems) I think you only get two SIMMs emulated but I will have to see what happens if you put the P2K operating system in a non-turbo module to be entirely sure. It will depend on the programming of the xilinx logic device on the motherboard I think and if they are the same between P2K and P1K then it may just work. Same may be true for an ultra and an audity.
7. These will work in an ultra sampler as a ROM but will not be programmable (ie EOS won't understand how to program the different FLASH devices)
8. A copy of a ROM SIMM is an exact copy with all the other stuff in the preset memory (arps etc)
9. Creating your own SIMM images from samples requires deciphering the existing contents of the ROM SIMMs. I have a strong feeling that they will be EOS images (.E4B files) because when you put a SIMM into an ultra sampler you see it as a disk drive and when you copy it it is a .E4B file. As soon as I figure that out (or anybody else does) everyone can make their own SIMM images.
10. reprogramming will be very slow. (around 2hrs for the entire image memory of the 2 FLASH option) I will work on speeding this up. changing the contents of a single preset memory will be considerably faster. Of course you will need to reset the device to access the new programming (because the P2K OS loads the preset memory into DRAM at boot only)
11. All of the address, data and control signals are available on the CPLD. Therefore someone could reprogram the FLASH devices through toggling the appropriate signals via JTAG. This would not be especially difficult to do but would be very time consuming. I would not like to hazard a guess at how long it would take to program 256MB of memory this way. I will need to check the CPLD data book about how long the boundary scan chain is but it would be about 150 bits (double this if direction bits are included). So that would make it around 10k writes/second at a 15MHz JTAG speed. Probably get less than half this and your JTAG clock will probably be 8MHz or less so think 8hrs to do this?
Will let you know when I have some more information �