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FLASH Progress Report

2010-10-14 by Jack Pratt

Have been very busy, what with home renovations, computer problems, flooding, 
etc...

I finally have been able to finish off the PCB layout for the USB programmable 
FLASH SIMM {top & bottom layers attached so you can see that its pretty full}. 
It was a lot of effort because I tried to use 8mil (0.008") track and space to 
reduce board cost but that was a dead cause, and finally I opted for 6mil track 
and space. I toiled long and hard to fit in on a 4 layer PCB and only just made 
it, but I had no way to place a USB connecter, other than a 4 pin header so a 
special cable will be needed for USB connection... We'll have to see how much 
the PCB costs (per item)

I need to check that the CPLD can still be programmed after the pin 
re-arrangements that I made to help it fit but I don't expect that to be a big 
problem.

I needed to make the SIMM 1.1" x 4.25" (the E-mu ones are only 1" high) to make 
room for the JTAG headers - this should still fit in the modules fine by my 
reckoning. The idea is that the SIMM gets turned upside down into a socket with 
the notch removed for JTAG programming.

Fortunately I was able to procure a copy of the EOS TSM from E-mu which includes 
schematics for all the E4 series products including the ULTRA samplers. Despite 
assertions that some people have made to the contrary, there is no signal on the 
Ultra to drive the PRESET line (to access the preset memory) so there is NO WAY 
the Ultra can write to a FLASH SIMM's preset memory  [if you see dummy presets 
on a p2k, then the p2k created them, not the Ultra]. In any case, the issue is 
that the signal is not driven on an Ultra sampler, so I might decide to add a 
pull down to that pin so that its not floating [which would allow the SIMM to be 
read (but not written without a modification to EOS) on an Ultra Sampler].

So the things left to do....

1. Create a PCB for the SIMM reader [much much easier than the SIMM itself]
    - necessary to program the micro & CPLD + read ROM SIMMs
2. Compile the CPLD software for the new pin arrangement [trivial]
3. Create Software for the SIMM CPU
4. Create Software for the programmer CPU

Have other stuff to do for now butthe hardest part is done [Yay!]

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