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mega 168

mega 168

2005-08-21 by Dennis

Using ATmega 168. INT0 works fine as does Timer1. Invoke INT1 (pushbutton rising edge) and it goes to interrupt routine and never returns.
Had some sample parts from rep brought in to replace original ES (preproduction) parts. Thought that might be the problem. Not so.
Doesn't matter what's in the interrupt routine. Can put the RETI as the only instruction and still doesn't return to the instruction following an infinite loop.
Doing a lot of head-banging on this one.
Any ideas
Thanks
Dennis

Re: [AVR-Chat] mega 168

2005-08-21 by Peter Gargano

Are you sure you have the right vector?

Dennis wrote:
> Using ATmega 168. INT0 works fine as does Timer1. Invoke INT1 
> (pushbutton rising edge) and it goes to  interrupt routine and never 
> returns.












.

Re: [AVR-Chat] mega 168

2005-08-21 by Dennis

Nebulous question. If all other interrupt vectors work OK why not this one?
D
----- Original Message ----- 
Show quoted textHide quoted text
From: "Peter Gargano" <peter@techedge.com.au>
To: <AVR-Chat@yahoogroups.com>
Sent: Saturday, August 20, 2005 10:36 PM
Subject: Re: [AVR-Chat] mega 168


> Are you sure you have the right vector?
>
> Dennis wrote:
>> Using ATmega 168. INT0 works fine as does Timer1. Invoke INT1
>> (pushbutton rising edge) and it goes to  interrupt routine and never
>> returns.
>
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> .
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> Yahoo! Groups Links
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Re: [AVR-Chat] mega 168

2005-08-21 by Peter Gargano

Dennis wrote:
> Nebulous question. If all other interrupt vectors work OK why not this one?

Continue to assume the hardware works! Either the vector you think 
you're using is wrong, or you do something bad in the correct ISR and 
it never returns, or maybe you blow the stack with repeated int calls. 
Surely a bit of diag code can work out what's happening?

Do you know your INT1 ISR gets entered, and via the correct vector?

INT1 is entered how many times per keypress? (hardware has a knack of 
bouncing and producing multiple ints.

..


Peter.

Re: [AVR-Chat] mega 168

2005-08-21 by Dennis

When interrupt occurs, EIMSK,1 is set to zero disabling further INT1 
interrupts. Interrupt routine loads T1 for 50ms debounce timeout and goes 
into infinite loop waiting for T1 timeout.
It really doesn't matter. As I stated before, if I do an RETI as the first 
instruction in the interrupt routine, it doesn't return.
The vectors are all standard assignments for a 168 with 16k flash.
Stack appears to operate properly if INT0 and Timer1 interrupts function.
It's a bugger. Have sent code to Atmel FAE to get his opinion. Might, maybe 
get it on Monday.
Otherwise, more head-banging.
Thanks
Dennis
----- Original Message ----- 
Show quoted textHide quoted text
From: "Peter Gargano" <peter@techedge.com.au>
To: <AVR-Chat@yahoogroups.com>
Sent: Saturday, August 20, 2005 11:17 PM
Subject: Re: [AVR-Chat] mega 168


> Dennis wrote:
>> Nebulous question. If all other interrupt vectors work OK why not this 
>> one?
>
> Continue to assume the hardware works! Either the vector you think
> you're using is wrong, or you do something bad in the correct ISR and
> it never returns, or maybe you blow the stack with repeated int calls.
> Surely a bit of diag code can work out what's happening?
>
> Do you know your INT1 ISR gets entered, and via the correct vector?
>
> INT1 is entered how many times per keypress? (hardware has a knack of
> bouncing and producing multiple ints.
>
> ..
>
>
> Peter.
>
>
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>
>
> Yahoo! Groups Links
>
>
>
>
>
>
>

Re: [AVR-Chat] mega 168

2005-08-21 by Mark Nowell

Dennis

FWIW I'm using both INT0 and INT1 on M168 with no problems ... now. I did 
spend several hours banging my head against these interrupts because a) I'd 
used the wrong vector names; b) more than one of the bit defs in the 
avr-libc headers were wrong. The latest WinAVR appears to correct the bit 
defs but it sounds as though you're using asm anyway?

Mark

----- Original Message ----- 
Show quoted textHide quoted text
From: "Dennis" <dkazar@sbcglobal.net>
To: <AVR-Chat@yahoogroups.com>
Sent: Sunday, August 21, 2005 5:31 AM
Subject: Re: [AVR-Chat] mega 168


> When interrupt occurs, EIMSK,1 is set to zero disabling further INT1
> interrupts. Interrupt routine loads T1 for 50ms debounce timeout and goes
> into infinite loop waiting for T1 timeout.
> It really doesn't matter. As I stated before, if I do an RETI as the first
> instruction in the interrupt routine, it doesn't return.
> The vectors are all standard assignments for a 168 with 16k flash.
> Stack appears to operate properly if INT0 and Timer1 interrupts function.
> It's a bugger. Have sent code to Atmel FAE to get his opinion. Might, 
> maybe
> get it on Monday.
> Otherwise, more head-banging.
> Thanks
> Dennis

Re: [AVR-Chat] mega 168

2005-08-21 by Dennis

Changed vector names from ZCINT0 to EXT_INT0 and PBINT1 to EXT_INT1 per the 
168 data manual. Still the same results. More head banging.
D
----- Original Message ----- 
Show quoted textHide quoted text
From: "Mark Nowell" <mark@dicam.co.uk>
To: <AVR-Chat@yahoogroups.com>
Sent: Sunday, August 21, 2005 1:39 AM
Subject: Re: [AVR-Chat] mega 168


> Dennis
>
> FWIW I'm using both INT0 and INT1 on M168 with no problems ... now. I did
> spend several hours banging my head against these interrupts because a) 
> I'd
> used the wrong vector names; b) more than one of the bit defs in the
> avr-libc headers were wrong. The latest WinAVR appears to correct the bit
> defs but it sounds as though you're using asm anyway?
>
> Mark
>
> ----- Original Message ----- 
> From: "Dennis" <dkazar@sbcglobal.net>
> To: <AVR-Chat@yahoogroups.com>
> Sent: Sunday, August 21, 2005 5:31 AM
> Subject: Re: [AVR-Chat] mega 168
>
>
>> When interrupt occurs, EIMSK,1 is set to zero disabling further INT1
>> interrupts. Interrupt routine loads T1 for 50ms debounce timeout and goes
>> into infinite loop waiting for T1 timeout.
>> It really doesn't matter. As I stated before, if I do an RETI as the 
>> first
>> instruction in the interrupt routine, it doesn't return.
>> The vectors are all standard assignments for a 168 with 16k flash.
>> Stack appears to operate properly if INT0 and Timer1 interrupts function.
>> It's a bugger. Have sent code to Atmel FAE to get his opinion. Might,
>> maybe
>> get it on Monday.
>> Otherwise, more head-banging.
>> Thanks
>> Dennis
>
>
>
>
>
> Yahoo! Groups Links
>
>
>
>
>
>
>

Re: [AVR-Chat] mega 168

2005-08-21 by Thomas Keller

On Sat, 2005-08-20 at 22:18 -0500, Dennis wrote:
> Using ATmega 168. INT0 works fine as does Timer1. Invoke INT1
> (pushbutton rising edge) and it goes to  interrupt routine and never
> returns.
> Had some sample parts from rep brought in to replace original ES
> (preproduction) parts. Thought that might be the problem. Not so.
> Doesn't matter what's in the interrupt routine. Can put the RETI as
> the only instruction and still doesn't return to the instruction
> following an infinite loop.
> Doing a lot of head-banging on this one.

   Stop banging your head!  It hurts!      *grin*

   Seriously, wait for the FAE to respond.  I suspect you have located a
legitimate bug in the hardware, anfd that this is what you'll hear
back.  

   While, in general, one assumes that one is making some sort of
obscure error when such things are encountered (which is MUCH more
likely), hardware bugs *DO* occur, and based on your descriptions of
your diagnostics, I suspect you have found one.  Time (and the FAE) will
tell.

Tom

RE: [AVR-Chat] mega 168

2005-08-21 by Larry Barello

It is very, very, VERY UNLIKELY you have stumbled across a CPU problem. It
is very, very LIKELY your code is the problem.  Unless you show us your code
and how you built it (what compiler, etc), there is little anyone can do to
help you.

Cheers!
Show quoted textHide quoted text
-----Original Message-----
From: AVR-Chat@yahoogroups.com [mailto:AVR-Chat@yahoogroups.com] On Behalf
Of Dennis
Sent: Sunday, August 21, 2005 8:09 AM
To: AVR-Chat@yahoogroups.com
Subject: Re: [AVR-Chat] mega 168

Changed vector names from ZCINT0 to EXT_INT0 and PBINT1 to EXT_INT1 per the 
168 data manual. Still the same results. More head banging.
D
----- Original Message ----- 
From: "Mark Nowell" <mark@dicam.co.uk>
To: <AVR-Chat@yahoogroups.com>
Sent: Sunday, August 21, 2005 1:39 AM
Subject: Re: [AVR-Chat] mega 168


> Dennis
>
> FWIW I'm using both INT0 and INT1 on M168 with no problems ... now. I did
> spend several hours banging my head against these interrupts because a) 
> I'd
> used the wrong vector names; b) more than one of the bit defs in the
> avr-libc headers were wrong. The latest WinAVR appears to correct the bit
> defs but it sounds as though you're using asm anyway?
>
> Mark
>
> ----- Original Message ----- 
> From: "Dennis" <dkazar@sbcglobal.net>
> To: <AVR-Chat@yahoogroups.com>
> Sent: Sunday, August 21, 2005 5:31 AM
> Subject: Re: [AVR-Chat] mega 168
>
>
>> When interrupt occurs, EIMSK,1 is set to zero disabling further INT1
>> interrupts. Interrupt routine loads T1 for 50ms debounce timeout and goes
>> into infinite loop waiting for T1 timeout.
>> It really doesn't matter. As I stated before, if I do an RETI as the 
>> first
>> instruction in the interrupt routine, it doesn't return.
>> The vectors are all standard assignments for a 168 with 16k flash.
>> Stack appears to operate properly if INT0 and Timer1 interrupts function.
>> It's a bugger. Have sent code to Atmel FAE to get his opinion. Might,
>> maybe
>> get it on Monday.
>> Otherwise, more head-banging.
>> Thanks
>> Dennis
>
>
>
>
>
> Yahoo! Groups Links
>
>
>
>
>
>
> 




 
Yahoo! Groups Links

Re: [AVR-Chat] mega 168

2005-08-21 by Dennis

Here is the code using AVR Studio SP3. As I said, I can put the RETI as the 
only instruction in the PBINT1 service routine and the same still happens. I 
can also take the infinite loop out of the routine (waiting for T1 
interrupt), put it following the first infinite loop, and the same happens. 
I'm using visual "breakpoints". The processor is generating triggers to an 
STM quad AC switch which drives 3 AC driven strings of LEDs.
D
Show quoted textHide quoted text
----- Original Message ----- 
From: "Larry Barello" <yahoo@barello.net>
To: <AVR-Chat@yahoogroups.com>
Sent: Sunday, August 21, 2005 12:05 PM
Subject: RE: [AVR-Chat] mega 168


It is very, very, VERY UNLIKELY you have stumbled across a CPU problem. It
is very, very LIKELY your code is the problem.  Unless you show us your code
and how you built it (what compiler, etc), there is little anyone can do to
help you.

Cheers!

-----Original Message-----
From: AVR-Chat@yahoogroups.com [mailto:AVR-Chat@yahoogroups.com] On Behalf
Of Dennis
Sent: Sunday, August 21, 2005 8:09 AM
To: AVR-Chat@yahoogroups.com
Subject: Re: [AVR-Chat] mega 168

Changed vector names from ZCINT0 to EXT_INT0 and PBINT1 to EXT_INT1 per the
168 data manual. Still the same results. More head banging.
D
----- Original Message ----- 
From: "Mark Nowell" <mark@dicam.co.uk>
To: <AVR-Chat@yahoogroups.com>
Sent: Sunday, August 21, 2005 1:39 AM
Subject: Re: [AVR-Chat] mega 168


> Dennis
>
> FWIW I'm using both INT0 and INT1 on M168 with no problems ... now. I did
> spend several hours banging my head against these interrupts because a)
> I'd
> used the wrong vector names; b) more than one of the bit defs in the
> avr-libc headers were wrong. The latest WinAVR appears to correct the bit
> defs but it sounds as though you're using asm anyway?
>
> Mark
>
> ----- Original Message ----- 
> From: "Dennis" <dkazar@sbcglobal.net>
> To: <AVR-Chat@yahoogroups.com>
> Sent: Sunday, August 21, 2005 5:31 AM
> Subject: Re: [AVR-Chat] mega 168
>
>
>> When interrupt occurs, EIMSK,1 is set to zero disabling further INT1
>> interrupts. Interrupt routine loads T1 for 50ms debounce timeout and goes
>> into infinite loop waiting for T1 timeout.
>> It really doesn't matter. As I stated before, if I do an RETI as the
>> first
>> instruction in the interrupt routine, it doesn't return.
>> The vectors are all standard assignments for a 168 with 16k flash.
>> Stack appears to operate properly if INT0 and Timer1 interrupts function.
>> It's a bugger. Have sent code to Atmel FAE to get his opinion. Might,
>> maybe
>> get it on Monday.
>> Otherwise, more head-banging.
>> Thanks
>> Dennis
>
>
>
>
>
> Yahoo! Groups Links
>
>
>
>
>
>
>





Yahoo! Groups Links











Yahoo! Groups Links

RE: [AVR-Chat] mega 168

2005-08-21 by Larry Barello

Well, one problem leaps off the page: your have infinite loops which will
never exit.  Interrupt handlers return to the next address to FETCH, not the
next address!  When you jump to yourself, the next address to fetch is
yourself.

I recommend you get rid of the interrupt handler and just poll the timer
overflow bit.  Remember to reset it after it is set.  E.g.

loop:
	sbis	TIRF1, TOV1  
	rjmp	loop
	sbi	TIRF1, TOV1
Show quoted textHide quoted text
-----Original Message-----
From: AVR-Chat@yahoogroups.com [mailto:AVR-Chat@yahoogroups.com] On Behalf
Of Dennis
Sent: Sunday, August 21, 2005 10:28 AM
To: AVR-Chat@yahoogroups.com
Subject: Re: [AVR-Chat] mega 168

Here is the code using AVR Studio SP3. As I said, I can put the RETI as the 
only instruction in the PBINT1 service routine and the same still happens. I

can also take the infinite loop out of the routine (waiting for T1 
interrupt), put it following the first infinite loop, and the same happens. 
I'm using visual "breakpoints". The processor is generating triggers to an 
STM quad AC switch which drives 3 AC driven strings of LEDs.
D
----- Original Message ----- 
From: "Larry Barello" <yahoo@barello.net>
To: <AVR-Chat@yahoogroups.com>
Sent: Sunday, August 21, 2005 12:05 PM
Subject: RE: [AVR-Chat] mega 168


It is very, very, VERY UNLIKELY you have stumbled across a CPU problem. It
is very, very LIKELY your code is the problem.  Unless you show us your code
and how you built it (what compiler, etc), there is little anyone can do to
help you.

Cheers!

-----Original Message-----
From: AVR-Chat@yahoogroups.com [mailto:AVR-Chat@yahoogroups.com] On Behalf
Of Dennis
Sent: Sunday, August 21, 2005 8:09 AM
To: AVR-Chat@yahoogroups.com
Subject: Re: [AVR-Chat] mega 168

Changed vector names from ZCINT0 to EXT_INT0 and PBINT1 to EXT_INT1 per the
168 data manual. Still the same results. More head banging.
D
----- Original Message ----- 
From: "Mark Nowell" <mark@dicam.co.uk>
To: <AVR-Chat@yahoogroups.com>
Sent: Sunday, August 21, 2005 1:39 AM
Subject: Re: [AVR-Chat] mega 168


> Dennis
>
> FWIW I'm using both INT0 and INT1 on M168 with no problems ... now. I did
> spend several hours banging my head against these interrupts because a)
> I'd
> used the wrong vector names; b) more than one of the bit defs in the
> avr-libc headers were wrong. The latest WinAVR appears to correct the bit
> defs but it sounds as though you're using asm anyway?
>
> Mark
>
> ----- Original Message ----- 
> From: "Dennis" <dkazar@sbcglobal.net>
> To: <AVR-Chat@yahoogroups.com>
> Sent: Sunday, August 21, 2005 5:31 AM
> Subject: Re: [AVR-Chat] mega 168
>
>
>> When interrupt occurs, EIMSK,1 is set to zero disabling further INT1
>> interrupts. Interrupt routine loads T1 for 50ms debounce timeout and goes
>> into infinite loop waiting for T1 timeout.
>> It really doesn't matter. As I stated before, if I do an RETI as the
>> first
>> instruction in the interrupt routine, it doesn't return.
>> The vectors are all standard assignments for a 168 with 16k flash.
>> Stack appears to operate properly if INT0 and Timer1 interrupts function.
>> It's a bugger. Have sent code to Atmel FAE to get his opinion. Might,
>> maybe
>> get it on Monday.
>> Otherwise, more head-banging.
>> Thanks
>> Dennis
>
>
>
>
>
> Yahoo! Groups Links
>
>
>
>
>
>
>





Yahoo! Groups Links











Yahoo! Groups Links










 
Yahoo! Groups Links

Re: [AVR-Chat] mega 168

2005-08-22 by Dennis

An infinite loop sits there waiting for an interrupt. When the interrupt 
occurs, the stack is pushed with the current location. In the AVR, when the 
RETI happens, the Global interrupt is re-enabled and the stack is popped+2 
for high byte and low byte. That address is the instruction following the 
previous one, the infinite loop, ie. it shouldn't go back to the loop.
D
Show quoted textHide quoted text
----- Original Message ----- 
From: "Larry Barello" <yahoo@barello.net>
To: <AVR-Chat@yahoogroups.com>
Sent: Sunday, August 21, 2005 6:22 PM
Subject: RE: [AVR-Chat] mega 168


Well, one problem leaps off the page: your have infinite loops which will
never exit.  Interrupt handlers return to the next address to FETCH, not the
next address!  When you jump to yourself, the next address to fetch is
yourself.

I recommend you get rid of the interrupt handler and just poll the timer
overflow bit.  Remember to reset it after it is set.  E.g.

loop:
sbis TIRF1, TOV1
rjmp loop
sbi TIRF1, TOV1


-----Original Message-----
From: AVR-Chat@yahoogroups.com [mailto:AVR-Chat@yahoogroups.com] On Behalf
Of Dennis
Sent: Sunday, August 21, 2005 10:28 AM
To: AVR-Chat@yahoogroups.com
Subject: Re: [AVR-Chat] mega 168

Here is the code using AVR Studio SP3. As I said, I can put the RETI as the
only instruction in the PBINT1 service routine and the same still happens. I

can also take the infinite loop out of the routine (waiting for T1
interrupt), put it following the first infinite loop, and the same happens.
I'm using visual "breakpoints". The processor is generating triggers to an
STM quad AC switch which drives 3 AC driven strings of LEDs.
D
----- Original Message ----- 
From: "Larry Barello" <yahoo@barello.net>
To: <AVR-Chat@yahoogroups.com>
Sent: Sunday, August 21, 2005 12:05 PM
Subject: RE: [AVR-Chat] mega 168


It is very, very, VERY UNLIKELY you have stumbled across a CPU problem. It
is very, very LIKELY your code is the problem.  Unless you show us your code
and how you built it (what compiler, etc), there is little anyone can do to
help you.

Cheers!

-----Original Message-----
From: AVR-Chat@yahoogroups.com [mailto:AVR-Chat@yahoogroups.com] On Behalf
Of Dennis
Sent: Sunday, August 21, 2005 8:09 AM
To: AVR-Chat@yahoogroups.com
Subject: Re: [AVR-Chat] mega 168

Changed vector names from ZCINT0 to EXT_INT0 and PBINT1 to EXT_INT1 per the
168 data manual. Still the same results. More head banging.
D
----- Original Message ----- 
From: "Mark Nowell" <mark@dicam.co.uk>
To: <AVR-Chat@yahoogroups.com>
Sent: Sunday, August 21, 2005 1:39 AM
Subject: Re: [AVR-Chat] mega 168


> Dennis
>
> FWIW I'm using both INT0 and INT1 on M168 with no problems ... now. I did
> spend several hours banging my head against these interrupts because a)
> I'd
> used the wrong vector names; b) more than one of the bit defs in the
> avr-libc headers were wrong. The latest WinAVR appears to correct the bit
> defs but it sounds as though you're using asm anyway?
>
> Mark
>
> ----- Original Message ----- 
> From: "Dennis" <dkazar@sbcglobal.net>
> To: <AVR-Chat@yahoogroups.com>
> Sent: Sunday, August 21, 2005 5:31 AM
> Subject: Re: [AVR-Chat] mega 168
>
>
>> When interrupt occurs, EIMSK,1 is set to zero disabling further INT1
>> interrupts. Interrupt routine loads T1 for 50ms debounce timeout and goes
>> into infinite loop waiting for T1 timeout.
>> It really doesn't matter. As I stated before, if I do an RETI as the
>> first
>> instruction in the interrupt routine, it doesn't return.
>> The vectors are all standard assignments for a 168 with 16k flash.
>> Stack appears to operate properly if INT0 and Timer1 interrupts function.
>> It's a bugger. Have sent code to Atmel FAE to get his opinion. Might,
>> maybe
>> get it on Monday.
>> Otherwise, more head-banging.
>> Thanks
>> Dennis
>
>
>
>
>
> Yahoo! Groups Links
>
>
>
>
>
>
>





Yahoo! Groups Links











Yahoo! Groups Links











Yahoo! Groups Links









Yahoo! Groups Links

RE: [AVR-Chat] mega 168

2005-08-22 by Larry Barello

If what you are saying is true (and it isn't) then this very common
programming idiom won't work since an interrupt on the "rjmp" instruction
will cause it to exit. 

Forever:
	Rcall DoThisTask
	Rcall DoThatTask
	Rcall etc
	Rjmp forever

Please re-read my previous response again.  What is pushed is the address of
the next instruction to execute, not the next address.

Cheers!
Show quoted textHide quoted text
-----Original Message-----
From: AVR-Chat@yahoogroups.com [mailto:AVR-Chat@yahoogroups.com] On Behalf
Of Dennis
Sent: Sunday, August 21, 2005 6:45 PM
To: AVR-Chat@yahoogroups.com
Subject: Re: [AVR-Chat] mega 168

An infinite loop sits there waiting for an interrupt. When the interrupt 
occurs, the stack is pushed with the current location. In the AVR, when the 
RETI happens, the Global interrupt is re-enabled and the stack is popped+2 
for high byte and low byte. That address is the instruction following the 
previous one, the infinite loop, ie. it shouldn't go back to the loop.
D
----- Original Message ----- 
From: "Larry Barello" <yahoo@barello.net>
To: <AVR-Chat@yahoogroups.com>
Sent: Sunday, August 21, 2005 6:22 PM
Subject: RE: [AVR-Chat] mega 168


Well, one problem leaps off the page: your have infinite loops which will
never exit.  Interrupt handlers return to the next address to FETCH, not the
next address!  When you jump to yourself, the next address to fetch is
yourself.

I recommend you get rid of the interrupt handler and just poll the timer
overflow bit.  Remember to reset it after it is set.  E.g.

loop:
sbis TIRF1, TOV1
rjmp loop
sbi TIRF1, TOV1


-----Original Message-----
From: AVR-Chat@yahoogroups.com [mailto:AVR-Chat@yahoogroups.com] On Behalf
Of Dennis
Sent: Sunday, August 21, 2005 10:28 AM
To: AVR-Chat@yahoogroups.com
Subject: Re: [AVR-Chat] mega 168

Here is the code using AVR Studio SP3. As I said, I can put the RETI as the
only instruction in the PBINT1 service routine and the same still happens. I

can also take the infinite loop out of the routine (waiting for T1
interrupt), put it following the first infinite loop, and the same happens.
I'm using visual "breakpoints". The processor is generating triggers to an
STM quad AC switch which drives 3 AC driven strings of LEDs.
D
----- Original Message ----- 
From: "Larry Barello" <yahoo@barello.net>
To: <AVR-Chat@yahoogroups.com>
Sent: Sunday, August 21, 2005 12:05 PM
Subject: RE: [AVR-Chat] mega 168


It is very, very, VERY UNLIKELY you have stumbled across a CPU problem. It
is very, very LIKELY your code is the problem.  Unless you show us your code
and how you built it (what compiler, etc), there is little anyone can do to
help you.

Cheers!

-----Original Message-----
From: AVR-Chat@yahoogroups.com [mailto:AVR-Chat@yahoogroups.com] On Behalf
Of Dennis
Sent: Sunday, August 21, 2005 8:09 AM
To: AVR-Chat@yahoogroups.com
Subject: Re: [AVR-Chat] mega 168

Changed vector names from ZCINT0 to EXT_INT0 and PBINT1 to EXT_INT1 per the
168 data manual. Still the same results. More head banging.
D
----- Original Message ----- 
From: "Mark Nowell" <mark@dicam.co.uk>
To: <AVR-Chat@yahoogroups.com>
Sent: Sunday, August 21, 2005 1:39 AM
Subject: Re: [AVR-Chat] mega 168


> Dennis
>
> FWIW I'm using both INT0 and INT1 on M168 with no problems ... now. I did
> spend several hours banging my head against these interrupts because a)
> I'd
> used the wrong vector names; b) more than one of the bit defs in the
> avr-libc headers were wrong. The latest WinAVR appears to correct the bit
> defs but it sounds as though you're using asm anyway?
>
> Mark
>
> ----- Original Message ----- 
> From: "Dennis" <dkazar@sbcglobal.net>
> To: <AVR-Chat@yahoogroups.com>
> Sent: Sunday, August 21, 2005 5:31 AM
> Subject: Re: [AVR-Chat] mega 168
>
>
>> When interrupt occurs, EIMSK,1 is set to zero disabling further INT1
>> interrupts. Interrupt routine loads T1 for 50ms debounce timeout and goes
>> into infinite loop waiting for T1 timeout.
>> It really doesn't matter. As I stated before, if I do an RETI as the
>> first
>> instruction in the interrupt routine, it doesn't return.
>> The vectors are all standard assignments for a 168 with 16k flash.
>> Stack appears to operate properly if INT0 and Timer1 interrupts function.
>> It's a bugger. Have sent code to Atmel FAE to get his opinion. Might,
>> maybe
>> get it on Monday.
>> Otherwise, more head-banging.
>> Thanks
>> Dennis
>
>
>
>
>
> Yahoo! Groups Links
>
>
>
>
>
>
>





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Re: [AVR-Chat] mega 168

2005-08-22 by Dennis

What I am saying is the next instruction is not being executed. In an 
interrupt driven system, a loop is waiting for the interrupt. When it 
happens the process continues from the instruction following the loop. It 
doesn't go back to the loop, or not supposed to.
D
----- Original Message ----- 
Show quoted textHide quoted text
From: "Larry Barello" <yahoo@barello.net>
To: <AVR-Chat@yahoogroups.com>
Sent: Sunday, August 21, 2005 9:33 PM
Subject: RE: [AVR-Chat] mega 168


> If what you are saying is true (and it isn't) then this very common
> programming idiom won't work since an interrupt on the "rjmp" instruction
> will cause it to exit.
>
> Forever:
> Rcall DoThisTask
> Rcall DoThatTask
> Rcall etc
> Rjmp forever
>
> Please re-read my previous response again.  What is pushed is the address 
> of
> the next instruction to execute, not the next address.
>
> Cheers!
>
> -----Original Message-----
> From: AVR-Chat@yahoogroups.com [mailto:AVR-Chat@yahoogroups.com] On Behalf
> Of Dennis
> Sent: Sunday, August 21, 2005 6:45 PM
> To: AVR-Chat@yahoogroups.com
> Subject: Re: [AVR-Chat] mega 168
>
> An infinite loop sits there waiting for an interrupt. When the interrupt
> occurs, the stack is pushed with the current location. In the AVR, when 
> the
> RETI happens, the Global interrupt is re-enabled and the stack is popped+2
> for high byte and low byte. That address is the instruction following the
> previous one, the infinite loop, ie. it shouldn't go back to the loop.
> D
> ----- Original Message ----- 
> From: "Larry Barello" <yahoo@barello.net>
> To: <AVR-Chat@yahoogroups.com>
> Sent: Sunday, August 21, 2005 6:22 PM
> Subject: RE: [AVR-Chat] mega 168
>
>
> Well, one problem leaps off the page: your have infinite loops which will
> never exit.  Interrupt handlers return to the next address to FETCH, not 
> the
> next address!  When you jump to yourself, the next address to fetch is
> yourself.
>
> I recommend you get rid of the interrupt handler and just poll the timer
> overflow bit.  Remember to reset it after it is set.  E.g.
>
> loop:
> sbis TIRF1, TOV1
> rjmp loop
> sbi TIRF1, TOV1
>
>
> -----Original Message-----
> From: AVR-Chat@yahoogroups.com [mailto:AVR-Chat@yahoogroups.com] On Behalf
> Of Dennis
> Sent: Sunday, August 21, 2005 10:28 AM
> To: AVR-Chat@yahoogroups.com
> Subject: Re: [AVR-Chat] mega 168
>
> Here is the code using AVR Studio SP3. As I said, I can put the RETI as 
> the
> only instruction in the PBINT1 service routine and the same still happens. 
> I
>
> can also take the infinite loop out of the routine (waiting for T1
> interrupt), put it following the first infinite loop, and the same 
> happens.
> I'm using visual "breakpoints". The processor is generating triggers to an
> STM quad AC switch which drives 3 AC driven strings of LEDs.
> D
> ----- Original Message ----- 
> From: "Larry Barello" <yahoo@barello.net>
> To: <AVR-Chat@yahoogroups.com>
> Sent: Sunday, August 21, 2005 12:05 PM
> Subject: RE: [AVR-Chat] mega 168
>
>
> It is very, very, VERY UNLIKELY you have stumbled across a CPU problem. It
> is very, very LIKELY your code is the problem.  Unless you show us your 
> code
> and how you built it (what compiler, etc), there is little anyone can do 
> to
> help you.
>
> Cheers!
>
> -----Original Message-----
> From: AVR-Chat@yahoogroups.com [mailto:AVR-Chat@yahoogroups.com] On Behalf
> Of Dennis
> Sent: Sunday, August 21, 2005 8:09 AM
> To: AVR-Chat@yahoogroups.com
> Subject: Re: [AVR-Chat] mega 168
>
> Changed vector names from ZCINT0 to EXT_INT0 and PBINT1 to EXT_INT1 per 
> the
> 168 data manual. Still the same results. More head banging.
> D
> ----- Original Message ----- 
> From: "Mark Nowell" <mark@dicam.co.uk>
> To: <AVR-Chat@yahoogroups.com>
> Sent: Sunday, August 21, 2005 1:39 AM
> Subject: Re: [AVR-Chat] mega 168
>
>
>> Dennis
>>
>> FWIW I'm using both INT0 and INT1 on M168 with no problems ... now. I did
>> spend several hours banging my head against these interrupts because a)
>> I'd
>> used the wrong vector names; b) more than one of the bit defs in the
>> avr-libc headers were wrong. The latest WinAVR appears to correct the bit
>> defs but it sounds as though you're using asm anyway?
>>
>> Mark
>>
>> ----- Original Message ----- 
>> From: "Dennis" <dkazar@sbcglobal.net>
>> To: <AVR-Chat@yahoogroups.com>
>> Sent: Sunday, August 21, 2005 5:31 AM
>> Subject: Re: [AVR-Chat] mega 168
>>
>>
>>> When interrupt occurs, EIMSK,1 is set to zero disabling further INT1
>>> interrupts. Interrupt routine loads T1 for 50ms debounce timeout and 
>>> goes
>>> into infinite loop waiting for T1 timeout.
>>> It really doesn't matter. As I stated before, if I do an RETI as the
>>> first
>>> instruction in the interrupt routine, it doesn't return.
>>> The vectors are all standard assignments for a 168 with 16k flash.
>>> Stack appears to operate properly if INT0 and Timer1 interrupts 
>>> function.
>>> It's a bugger. Have sent code to Atmel FAE to get his opinion. Might,
>>> maybe
>>> get it on Monday.
>>> Otherwise, more head-banging.
>>> Thanks
>>> Dennis
>>
>>
>>
>>
>>
>> Yahoo! Groups Links
>>
>>
>>
>>
>>
>>
>>
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Re: [AVR-Chat] mega 168

2005-08-22 by Dennis

Hello!! The address of the next instruction to execute is the next 
instruction.
D
----- Original Message ----- 
Show quoted textHide quoted text
From: "Larry Barello" <yahoo@barello.net>
To: <AVR-Chat@yahoogroups.com>
Sent: Sunday, August 21, 2005 9:33 PM
Subject: RE: [AVR-Chat] mega 168


> If what you are saying is true (and it isn't) then this very common
> programming idiom won't work since an interrupt on the "rjmp" instruction
> will cause it to exit.
>
> Forever:
> Rcall DoThisTask
> Rcall DoThatTask
> Rcall etc
> Rjmp forever
>
> Please re-read my previous response again.  What is pushed is the address 
> of
> the next instruction to execute, not the next address.
>
> Cheers!
>
> -----Original Message-----
> From: AVR-Chat@yahoogroups.com [mailto:AVR-Chat@yahoogroups.com] On Behalf
> Of Dennis
> Sent: Sunday, August 21, 2005 6:45 PM
> To: AVR-Chat@yahoogroups.com
> Subject: Re: [AVR-Chat] mega 168
>
> An infinite loop sits there waiting for an interrupt. When the interrupt
> occurs, the stack is pushed with the current location. In the AVR, when 
> the
> RETI happens, the Global interrupt is re-enabled and the stack is popped+2
> for high byte and low byte. That address is the instruction following the
> previous one, the infinite loop, ie. it shouldn't go back to the loop.
> D
> ----- Original Message ----- 
> From: "Larry Barello" <yahoo@barello.net>
> To: <AVR-Chat@yahoogroups.com>
> Sent: Sunday, August 21, 2005 6:22 PM
> Subject: RE: [AVR-Chat] mega 168
>
>
> Well, one problem leaps off the page: your have infinite loops which will
> never exit.  Interrupt handlers return to the next address to FETCH, not 
> the
> next address!  When you jump to yourself, the next address to fetch is
> yourself.
>
> I recommend you get rid of the interrupt handler and just poll the timer
> overflow bit.  Remember to reset it after it is set.  E.g.
>
> loop:
> sbis TIRF1, TOV1
> rjmp loop
> sbi TIRF1, TOV1
>
>
> -----Original Message-----
> From: AVR-Chat@yahoogroups.com [mailto:AVR-Chat@yahoogroups.com] On Behalf
> Of Dennis
> Sent: Sunday, August 21, 2005 10:28 AM
> To: AVR-Chat@yahoogroups.com
> Subject: Re: [AVR-Chat] mega 168
>
> Here is the code using AVR Studio SP3. As I said, I can put the RETI as 
> the
> only instruction in the PBINT1 service routine and the same still happens. 
> I
>
> can also take the infinite loop out of the routine (waiting for T1
> interrupt), put it following the first infinite loop, and the same 
> happens.
> I'm using visual "breakpoints". The processor is generating triggers to an
> STM quad AC switch which drives 3 AC driven strings of LEDs.
> D
> ----- Original Message ----- 
> From: "Larry Barello" <yahoo@barello.net>
> To: <AVR-Chat@yahoogroups.com>
> Sent: Sunday, August 21, 2005 12:05 PM
> Subject: RE: [AVR-Chat] mega 168
>
>
> It is very, very, VERY UNLIKELY you have stumbled across a CPU problem. It
> is very, very LIKELY your code is the problem.  Unless you show us your 
> code
> and how you built it (what compiler, etc), there is little anyone can do 
> to
> help you.
>
> Cheers!
>
> -----Original Message-----
> From: AVR-Chat@yahoogroups.com [mailto:AVR-Chat@yahoogroups.com] On Behalf
> Of Dennis
> Sent: Sunday, August 21, 2005 8:09 AM
> To: AVR-Chat@yahoogroups.com
> Subject: Re: [AVR-Chat] mega 168
>
> Changed vector names from ZCINT0 to EXT_INT0 and PBINT1 to EXT_INT1 per 
> the
> 168 data manual. Still the same results. More head banging.
> D
> ----- Original Message ----- 
> From: "Mark Nowell" <mark@dicam.co.uk>
> To: <AVR-Chat@yahoogroups.com>
> Sent: Sunday, August 21, 2005 1:39 AM
> Subject: Re: [AVR-Chat] mega 168
>
>
>> Dennis
>>
>> FWIW I'm using both INT0 and INT1 on M168 with no problems ... now. I did
>> spend several hours banging my head against these interrupts because a)
>> I'd
>> used the wrong vector names; b) more than one of the bit defs in the
>> avr-libc headers were wrong. The latest WinAVR appears to correct the bit
>> defs but it sounds as though you're using asm anyway?
>>
>> Mark
>>
>> ----- Original Message ----- 
>> From: "Dennis" <dkazar@sbcglobal.net>
>> To: <AVR-Chat@yahoogroups.com>
>> Sent: Sunday, August 21, 2005 5:31 AM
>> Subject: Re: [AVR-Chat] mega 168
>>
>>
>>> When interrupt occurs, EIMSK,1 is set to zero disabling further INT1
>>> interrupts. Interrupt routine loads T1 for 50ms debounce timeout and 
>>> goes
>>> into infinite loop waiting for T1 timeout.
>>> It really doesn't matter. As I stated before, if I do an RETI as the
>>> first
>>> instruction in the interrupt routine, it doesn't return.
>>> The vectors are all standard assignments for a 168 with 16k flash.
>>> Stack appears to operate properly if INT0 and Timer1 interrupts 
>>> function.
>>> It's a bugger. Have sent code to Atmel FAE to get his opinion. Might,
>>> maybe
>>> get it on Monday.
>>> Otherwise, more head-banging.
>>> Thanks
>>> Dennis
>>
>>
>>
>>
>>
>> Yahoo! Groups Links
>>
>>
>>
>>
>>
>>
>>
>
>
>
>
>
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Re: [AVR-Chat] mega 168

2005-08-22 by Mark Jordan

On 21 Aug 2005 at 21:45, Dennis wrote:

> What I am saying is the next instruction is not being executed. In an 
> interrupt driven system, a loop is waiting for the interrupt. When it 
> happens the process continues from the instruction following the loop. It 
> doesn't go back to the loop, or not supposed to.
> D

	That would happen only if the ISR mess with the Stack.
	Other way the processor stays inside the loop.

	I have used loops waiting for some flag that was changed
inside the ISR.

	Mark

Re: [AVR-Chat] mega 168

2005-08-22 by Dennis

The ISR address must be good otherwise it wouldn't go to the service 
routine.
D
----- Original Message ----- 
Show quoted textHide quoted text
From: "Mark Jordan" <mark@cpovo.net>
To: <AVR-Chat@yahoogroups.com>
Sent: Sunday, August 21, 2005 10:15 PM
Subject: Re: [AVR-Chat] mega 168


> On 21 Aug 2005 at 21:45, Dennis wrote:
>
>> What I am saying is the next instruction is not being executed. In an
>> interrupt driven system, a loop is waiting for the interrupt. When it
>> happens the process continues from the instruction following the loop. It
>> doesn't go back to the loop, or not supposed to.
>> D
>
> That would happen only if the ISR mess with the Stack.
> Other way the processor stays inside the loop.
>
> I have used loops waiting for some flag that was changed
> inside the ISR.
>
> Mark
>
>
>
>
>
>
> Yahoo! Groups Links
>
>
>
>
>
>
>

Re: [AVR-Chat] mega 168

2005-08-22 by John Samperi

At 01:08 PM 22/08/2005, you wrote:
>Hello!! The address of the next instruction to execute is the next
>instruction.

LOOP0:
         rjmp LOOP0      ;wait for PBINT1 interrupt (pattern select pushbutton)

The above will NEVER go here but it will be stuck forever into the 
loop because the next
instruction is rjmp LOOP0 no matter what happens in your interrupt routine.

         cbi PORTD,5


Regards

John Samperi

******************************************************
                         Ampertronics Pty. Ltd.
   11 Brokenwood Place Baulkham Hills, NSW 2153 AUSTRALIA
          Tel. (02) 9674-6495       Fax (02) 9674-8745
                Email: samperi@ampertronics.com.au
                  Website  http://www.ampertronics.com.au
* Electronic Design   * Custom Products   * Contract Assembly
******************************************************

Re: mega 168

2005-08-23 by Volkmar Dierkes

Dennis,

I am sorry, but you are wrong. In an interrupt driven system, an
interrupt may occur at any time. If the serving of the interrupt
would end in returning to a different address, the code wouldn't be
executed in the desired sequence. If you want to wait in a loop
until the interrupt is being serviced, you need to set a flag in the
ISR and check this flag in your loop to exit it at the given time.

Please reread the datasheet to understand the interrupts correctly.

Volkmar
Show quoted textHide quoted text
On Sun, 21 Aug 2005 21:45:48 -0500, Dennis wrote:

> What I am saying is the next instruction is not being executed. In an 
> interrupt driven system, a loop is waiting for the interrupt. When it 
> happens the process continues from the instruction following the loop. It 
> doesn't go back to the loop, or not supposed to.
> D
> ----- Original Message ----- 
> From: "Larry Barello" <yahoo@barello.net>
> To: <AVR-Chat@yahoogroups.com>
> Sent: Sunday, August 21, 2005 9:33 PM
> Subject: RE: [AVR-Chat] mega 168
>
>
>> If what you are saying is true (and it isn't) then this very common
>> programming idiom won't work since an interrupt on the "rjmp" instruction
>> will cause it to exit.
>>
>> Forever:
>> Rcall DoThisTask
>> Rcall DoThatTask
>> Rcall etc
>> Rjmp forever
>>
>> Please re-read my previous response again.  What is pushed is the address 
>> of
>> the next instruction to execute, not the next address.
>>
>> Cheers!
>>

Re: [AVR-Chat] Re: mega 168

2005-08-23 by Dennis

Not that I disagree with you, however, look at the RETI for th 8051. Also, 
check out the RET and RETI instruction explanantion is the instruction set 
manual. Both of the latter use the same stack operation implying they 
function the same. RET returns to the instruction following the CALL, RETI 
does not.

I've changed my code to accomodate the RETI. Doesn't make much sense to have 
infinite loops.

RETI (80C51 Instruction Set)

Function: Return from interrupt

Description: RETI pops the high- and low-order bytes of the PC successively 
from the stack and restores the interrupt logic to

accept additional interrupts at the same priority level as the one just 
processed. The Stack Pointer is left

decremented by two. No other registers are affected; the PSW is not 
automatically restored to its pre-interrupt

status. Program execution continues at the resulting address, which is 
generally the instruction immediately after

the point at which the interrupt request was detected. If a lower- or 
same-level interrupt was pending when the

RETI instruction is executed, that one instruction is executed before the 
pending interrupt is processed.

Example: The Stack Pointer originally contains the value 0BH. An interrupt 
was detected during the instruction ending at

location 0122H. Internal RAM locations 0AH and 0BH contain the values 23H 
and 01H, respectively. The

following instruction
Show quoted textHide quoted text
----- Original Message ----- 
From: "Volkmar Dierkes" <avrfreaks@dierkes.info>
To: <AVR-Chat@yahoogroups.com>
Sent: Tuesday, August 23, 2005 12:50 AM
Subject: [AVR-Chat] Re: mega 168


Dennis,

I am sorry, but you are wrong. In an interrupt driven system, an
interrupt may occur at any time. If the serving of the interrupt
would end in returning to a different address, the code wouldn't be
executed in the desired sequence. If you want to wait in a loop
until the interrupt is being serviced, you need to set a flag in the
ISR and check this flag in your loop to exit it at the given time.

Please reread the datasheet to understand the interrupts correctly.

Volkmar

On Sun, 21 Aug 2005 21:45:48 -0500, Dennis wrote:

> What I am saying is the next instruction is not being executed. In an
> interrupt driven system, a loop is waiting for the interrupt. When it
> happens the process continues from the instruction following the loop. It
> doesn't go back to the loop, or not supposed to.
> D
> ----- Original Message ----- 
> From: "Larry Barello" <yahoo@barello.net>
> To: <AVR-Chat@yahoogroups.com>
> Sent: Sunday, August 21, 2005 9:33 PM
> Subject: RE: [AVR-Chat] mega 168
>
>
>> If what you are saying is true (and it isn't) then this very common
>> programming idiom won't work since an interrupt on the "rjmp" instruction
>> will cause it to exit.
>>
>> Forever:
>> Rcall DoThisTask
>> Rcall DoThatTask
>> Rcall etc
>> Rjmp forever
>>
>> Please re-read my previous response again.  What is pushed is the address
>> of
>> the next instruction to execute, not the next address.
>>
>> Cheers!
>>




Yahoo! Groups Links

Re: [avr] Re: [AVR-Chat] Re: mega 168

2005-08-23 by Don Jackson

Dennis wrote:
> Not that I disagree with you, however, look at the RETI for th 8051. Also, 
> check out the RET and RETI instruction explanantion is the instruction set 
> manual. Both of the latter use the same stack operation implying they 
> function the same. RET returns to the instruction following the CALL, RETI 
> does not.
> 
> I've changed my code to accomodate the RETI. Doesn't make much sense to have 
> infinite loops.
> 
> RETI (80C51 Instruction Set)
> 
> Function: Return from interrupt
> 
> Description: RETI pops the high- and low-order bytes of the PC successively 
> from the stack and restores the interrupt logic to
> 
> accept additional interrupts at the same priority level as the one just 
> processed. The Stack Pointer is left
> 
> decremented by two. No other registers are affected; the PSW is not 
> automatically restored to its pre-interrupt
> 
> status. Program execution continues at the resulting address, which is 
> generally the instruction immediately after
> 
> the point at which the interrupt request was detected. If a lower- or 
> same-level interrupt was pending when the
> 
> RETI instruction is executed, that one instruction is executed before the 
> pending interrupt is processed.

Excuse me for the intrusion, but aren't we discussing the Atmel
ATMega168 rather than an 80C51?

Even then, note in the above for the '51 that it says "Program execution
continues at the resulting address, whis is generally the instruction
immediately after the point at which the interrupt request was detected."

This is also true for the AVR and every other micro I have seen ... but
the key word is "generally".  GENERALLY this means that the micro is
executing sequential inline code and the statement is then true.

Use a simulator or other tool and watch what happens when you step thru
the code.  You should be able to see what return address is pushed onto
the stack in an infinite loop situation (jump to yourself).

In many micros (not all!) the only difference between a RET and RETI
instruction is the treatment of the interrupt flag(s).  An interrupt
will not get you out of an infinite loop unless you somehow alter the
return address on the stack.

Don

Re: [AVR-Chat] Re: mega 168

2005-08-23 by Mark Jordan

On 23 Aug 2005 at 9:12, Dennis wrote:

> Not that I disagree with you, however, look at the RETI for th 8051. Also, check
> out the RET and RETI instruction explanantion is the instruction set manual.
> Both of the latter use the same stack operation implying they function the same.
> RET returns to the instruction following the CALL, RETI does not.

	Indeed it does. The RCALL is assumed. It can be anywhere in the program.

 
> I've changed my code to accomodate the RETI. Doesn't make much sense to have
> infinite loops.

	Why not?  I use them very often.

Re: [AVR-Chat] Re: mega 168

2005-08-23 by David Kelly

On Tue, Aug 23, 2005 at 09:12:05AM -0500, Dennis wrote:
> 
> I've changed my code to accomodate the RETI. Doesn't make much sense
> to have infinite loops.

Every embedded application I have ever written was formed as an infinite
loop.

It doesn't make much sense to have an empty infinite loop waiting on an
interrupt. Its quicker and simpler to poll in that situation.

-- 
David Kelly N4HHE, dkelly@HiWAAY.net
========================================================================
Whom computers would destroy, they must first drive mad.

Re: [AVR-Chat] Re: mega 168

2005-08-23 by John Samperi

At 12:12 AM 24/08/2005, you wrote:
>Not that I disagree with you, however, look at the RETI for th 8051. Also,
>check out the RET and RETI instruction explanantion is the instruction set
>manual. Both of the latter use the same stack operation implying they
>function the same. RET returns to the instruction following the CALL, RETI
>does not.

Well there is an easy way to find out, translate your code to 8051
code and run it in a simulator and see if it works differently to
the AVR and let us know. I have been working with microprocessors for
some 25 years and with at least a dozen different families/architectures
and I haven't seen a processor behave like you expect.

You can use your loop as long as you understand that

loop:
         rjmp loop

will ALWAYS and regardless of what happens anywhere else jumps
to itself so that the next instruction to be executed is rjmp loop

If on the other hand you put some code in your loop that tests
something for true or false and that something can be changed
by an interrupt then it will work well.
Let's say you enter your loop with r16=0 and your interrupt
routine changes it to 1 then you could do the following:

loop:
         tst r16         ;Check if r16 is still 0
         brne exit_loop  ;If no longer 0 then exit the loop
         rjmp loop       ;otherwise keep on waiting
exit_loop:
         more instructions

In your code you seem to test portd for some pattern
put this test within your loop and it will work but
by having an interrupt just happening will not exit
a loop.


Regards

John Samperi

******************************************************
                         Ampertronics Pty. Ltd.
   11 Brokenwood Place Baulkham Hills, NSW 2153 AUSTRALIA
          Tel. (02) 9674-6495       Fax (02) 9674-8745
                Email: samperi@ampertronics.com.au
                  Website  http://www.ampertronics.com.au
* Electronic Design   * Custom Products   * Contract Assembly
******************************************************

Re: [AVR-Chat] Re: mega 168

2005-08-23 by Dennis

Changed the code. Using GPIOR0,0 as a flag and a test loop on the register 
when the interrupt completes. Works fine.
Found what might be another little problem though. The GPIOR0, 1 and 2 
registers are supposed to work with the sbi, cbi, sbis and sbic 
instructions. GPIOR0 works fine, the others give me an "operand out of 
range" error when I build the code.
Thanks
Dennis
----- Original Message ----- 
Show quoted textHide quoted text
From: "John Samperi" <samperi@ampertronics.com.au>
To: <AVR-Chat@yahoogroups.com>
Sent: Tuesday, August 23, 2005 5:01 PM
Subject: Re: [AVR-Chat] Re: mega 168


> At 12:12 AM 24/08/2005, you wrote:
>>Not that I disagree with you, however, look at the RETI for th 8051. Also,
>>check out the RET and RETI instruction explanantion is the instruction set
>>manual. Both of the latter use the same stack operation implying they
>>function the same. RET returns to the instruction following the CALL, RETI
>>does not.
>
> Well there is an easy way to find out, translate your code to 8051
> code and run it in a simulator and see if it works differently to
> the AVR and let us know. I have been working with microprocessors for
> some 25 years and with at least a dozen different families/architectures
> and I haven't seen a processor behave like you expect.
>
> You can use your loop as long as you understand that
>
> loop:
>         rjmp loop
>
> will ALWAYS and regardless of what happens anywhere else jumps
> to itself so that the next instruction to be executed is rjmp loop
>
> If on the other hand you put some code in your loop that tests
> something for true or false and that something can be changed
> by an interrupt then it will work well.
> Let's say you enter your loop with r16=0 and your interrupt
> routine changes it to 1 then you could do the following:
>
> loop:
>         tst r16         ;Check if r16 is still 0
>         brne exit_loop  ;If no longer 0 then exit the loop
>         rjmp loop       ;otherwise keep on waiting
> exit_loop:
>         more instructions
>
> In your code you seem to test portd for some pattern
> put this test within your loop and it will work but
> by having an interrupt just happening will not exit
> a loop.
>
>
> Regards
>
> John Samperi
>
> ******************************************************
>                         Ampertronics Pty. Ltd.
>   11 Brokenwood Place Baulkham Hills, NSW 2153 AUSTRALIA
>          Tel. (02) 9674-6495       Fax (02) 9674-8745
>                Email: samperi@ampertronics.com.au
>                  Website  http://www.ampertronics.com.au
> * Electronic Design   * Custom Products   * Contract Assembly
> ******************************************************
>
>
>
>
>
>
> Yahoo! Groups Links
>
>
>
>
>
>
>

Parallel High Voltage AVR910 programmer?

2005-08-24 by Peter Gargano

Well, I finally spent the time to look at app. note AVR910 and now 
understand how to make something that should function like an AVRISP 
(well, as long as I keep updating the firmware to support newer CPU 
cores that I want to program).

The original AVR910 source code mentions [quote] ...

   "The host computer do not need to know if the programmer
    operates in serial or parallel mode."

So, has anyone designed and updated the firmware for a  high voltage 
parallel port programmer that otherwise has the same AVR910 interface?

Also, some of the newer AVR910 programmers support extra commands. Is 
there an official and updated "AVR910 specification"?

Peter















.

RE: [AVR-Chat] Re: mega 168

2005-08-24 by Larry Barello

You need to read the data sheet for the mega168 carefully, particularly the
areas of memory access, instruction references and the IO register
descriptions.

I don't know about your particular situation, but many of the newer mega
chips have extended I/O registers (>0x100) which cannot be accessed via
in/out instructions.  The SBI/CBI instructions are limited to the first 32
I/O locations, etc.  So you can have up to three situations:

Sbi/cbi	= classic, low 32 bytes of I/O

In	rx, REGISTER	= classic, upper 32 bytes of I/O
And	rx, 0x01
Out	REGISTER, rx

Lds	rx, memory_location	= new: everything else.
And	rx, 0x01
Sts	memory_location, rx

Depending upon what register you are dealing with.  Make no assumptions
about where grouped registers are located.  Many newer features (extended
timer interrupts, etc) are out in SRAM space since Atmel didn't leave enough
I/O space for the future...

BTW you can use direct memory reference (ld/st, lds/sts) to get to any
register (R0-R31, IO and SRAM) - that can be a very handy feature at times!

I know it is a little weird, but after a while you will begin to appreciate
the tradeoffs that Atmel made when assigning code space to the various
instruction types.

If you want weird, try assembly programming a PIC...

Cheers! 
Show quoted textHide quoted text
-----Original Message-----
From: AVR-Chat@yahoogroups.com [mailto:AVR-Chat@yahoogroups.com] On Behalf
Of Dennis
Sent: Tuesday, August 23, 2005 3:07 PM
To: AVR-Chat@yahoogroups.com
Subject: Re: [AVR-Chat] Re: mega 168

Changed the code. Using GPIOR0,0 as a flag and a test loop on the register 
when the interrupt completes. Works fine.
Found what might be another little problem though. The GPIOR0, 1 and 2 
registers are supposed to work with the sbi, cbi, sbis and sbic 
instructions. GPIOR0 works fine, the others give me an "operand out of 
range" error when I build the code.
Thanks
Dennis
----- Original Message ----- 
From: "John Samperi" <samperi@ampertronics.com.au>
To: <AVR-Chat@yahoogroups.com>
Sent: Tuesday, August 23, 2005 5:01 PM
Subject: Re: [AVR-Chat] Re: mega 168


> At 12:12 AM 24/08/2005, you wrote:
>>Not that I disagree with you, however, look at the RETI for th 8051. Also,
>>check out the RET and RETI instruction explanantion is the instruction set
>>manual. Both of the latter use the same stack operation implying they
>>function the same. RET returns to the instruction following the CALL, RETI
>>does not.
>
> Well there is an easy way to find out, translate your code to 8051
> code and run it in a simulator and see if it works differently to
> the AVR and let us know. I have been working with microprocessors for
> some 25 years and with at least a dozen different families/architectures
> and I haven't seen a processor behave like you expect.
>
> You can use your loop as long as you understand that
>
> loop:
>         rjmp loop
>
> will ALWAYS and regardless of what happens anywhere else jumps
> to itself so that the next instruction to be executed is rjmp loop
>
> If on the other hand you put some code in your loop that tests
> something for true or false and that something can be changed
> by an interrupt then it will work well.
> Let's say you enter your loop with r16=0 and your interrupt
> routine changes it to 1 then you could do the following:
>
> loop:
>         tst r16         ;Check if r16 is still 0
>         brne exit_loop  ;If no longer 0 then exit the loop
>         rjmp loop       ;otherwise keep on waiting
> exit_loop:
>         more instructions
>
> In your code you seem to test portd for some pattern
> put this test within your loop and it will work but
> by having an interrupt just happening will not exit
> a loop.
>
>
> Regards
>
> John Samperi
>
> ******************************************************
>                         Ampertronics Pty. Ltd.
>   11 Brokenwood Place Baulkham Hills, NSW 2153 AUSTRALIA
>          Tel. (02) 9674-6495       Fax (02) 9674-8745
>                Email: samperi@ampertronics.com.au
>                  Website  http://www.ampertronics.com.au
> * Electronic Design   * Custom Products   * Contract Assembly
> ******************************************************
>
>
>
>
>
>
> Yahoo! Groups Links
>
>
>
>
>
>
> 




 
Yahoo! Groups Links

Re: [AVR-Chat] Re: mega 168

2005-08-24 by Dennis

The data manual specifically states that the 3 registers are accessible by 
those instructions.
However, point taken. Manuals have been known to be wrong.
If you look at the "include" file it also specifies the register bits.
Maybe avr@atmel.com  hasn't been notified of the manual inaccuracy.
Thanks
Dennis
Show quoted textHide quoted text
----- Original Message ----- 
From: "Larry Barello" <yahoo@barello.net>
To: <AVR-Chat@yahoogroups.com>
Sent: Tuesday, August 23, 2005 8:49 PM
Subject: RE: [AVR-Chat] Re: mega 168


You need to read the data sheet for the mega168 carefully, particularly the
areas of memory access, instruction references and the IO register
descriptions.

I don't know about your particular situation, but many of the newer mega
chips have extended I/O registers (>0x100) which cannot be accessed via
in/out instructions.  The SBI/CBI instructions are limited to the first 32
I/O locations, etc.  So you can have up to three situations:

Sbi/cbi = classic, low 32 bytes of I/O

In rx, REGISTER = classic, upper 32 bytes of I/O
And rx, 0x01
Out REGISTER, rx

Lds rx, memory_location = new: everything else.
And rx, 0x01
Sts memory_location, rx

Depending upon what register you are dealing with.  Make no assumptions
about where grouped registers are located.  Many newer features (extended
timer interrupts, etc) are out in SRAM space since Atmel didn't leave enough
I/O space for the future...

BTW you can use direct memory reference (ld/st, lds/sts) to get to any
register (R0-R31, IO and SRAM) - that can be a very handy feature at times!

I know it is a little weird, but after a while you will begin to appreciate
the tradeoffs that Atmel made when assigning code space to the various
instruction types.

If you want weird, try assembly programming a PIC...

Cheers!

-----Original Message-----
From: AVR-Chat@yahoogroups.com [mailto:AVR-Chat@yahoogroups.com] On Behalf
Of Dennis
Sent: Tuesday, August 23, 2005 3:07 PM
To: AVR-Chat@yahoogroups.com
Subject: Re: [AVR-Chat] Re: mega 168

Changed the code. Using GPIOR0,0 as a flag and a test loop on the register
when the interrupt completes. Works fine.
Found what might be another little problem though. The GPIOR0, 1 and 2
registers are supposed to work with the sbi, cbi, sbis and sbic
instructions. GPIOR0 works fine, the others give me an "operand out of
range" error when I build the code.
Thanks
Dennis
----- Original Message ----- 
From: "John Samperi" <samperi@ampertronics.com.au>
To: <AVR-Chat@yahoogroups.com>
Sent: Tuesday, August 23, 2005 5:01 PM
Subject: Re: [AVR-Chat] Re: mega 168


> At 12:12 AM 24/08/2005, you wrote:
>>Not that I disagree with you, however, look at the RETI for th 8051. Also,
>>check out the RET and RETI instruction explanantion is the instruction set
>>manual. Both of the latter use the same stack operation implying they
>>function the same. RET returns to the instruction following the CALL, RETI
>>does not.
>
> Well there is an easy way to find out, translate your code to 8051
> code and run it in a simulator and see if it works differently to
> the AVR and let us know. I have been working with microprocessors for
> some 25 years and with at least a dozen different families/architectures
> and I haven't seen a processor behave like you expect.
>
> You can use your loop as long as you understand that
>
> loop:
>         rjmp loop
>
> will ALWAYS and regardless of what happens anywhere else jumps
> to itself so that the next instruction to be executed is rjmp loop
>
> If on the other hand you put some code in your loop that tests
> something for true or false and that something can be changed
> by an interrupt then it will work well.
> Let's say you enter your loop with r16=0 and your interrupt
> routine changes it to 1 then you could do the following:
>
> loop:
>         tst r16         ;Check if r16 is still 0
>         brne exit_loop  ;If no longer 0 then exit the loop
>         rjmp loop       ;otherwise keep on waiting
> exit_loop:
>         more instructions
>
> In your code you seem to test portd for some pattern
> put this test within your loop and it will work but
> by having an interrupt just happening will not exit
> a loop.
>
>
> Regards
>
> John Samperi
>
> ******************************************************
>                         Ampertronics Pty. Ltd.
>   11 Brokenwood Place Baulkham Hills, NSW 2153 AUSTRALIA
>          Tel. (02) 9674-6495       Fax (02) 9674-8745
>                Email: samperi@ampertronics.com.au
>                  Website  http://www.ampertronics.com.au
> * Electronic Design   * Custom Products   * Contract Assembly
> ******************************************************
>
>
>
>
>
>
> Yahoo! Groups Links
>
>
>
>
>
>
>





Yahoo! Groups Links












Yahoo! Groups Links

Re: [AVR-Chat] Re: mega 168

2005-08-24 by Dennis

Looked at the PIC for this project. Got somewhat confused at to how may 
functions the pins had. Really couldn't determine if it had what I needed.
Haven't checked out the lds etc. instructions with the GPIOR yet.
Another day dawns
D
Show quoted textHide quoted text
----- Original Message ----- 
From: "Dennis" <dkazar@sbcglobal.net>
To: <AVR-Chat@yahoogroups.com>
Sent: Tuesday, August 23, 2005 9:07 PM
Subject: Re: [AVR-Chat] Re: mega 168


The data manual specifically states that the 3 registers are accessible by
those instructions.
However, point taken. Manuals have been known to be wrong.
If you look at the "include" file it also specifies the register bits.
Maybe avr@atmel.com  hasn't been notified of the manual inaccuracy.
Thanks
Dennis
----- Original Message ----- 
From: "Larry Barello" <yahoo@barello.net>
To: <AVR-Chat@yahoogroups.com>
Sent: Tuesday, August 23, 2005 8:49 PM
Subject: RE: [AVR-Chat] Re: mega 168


You need to read the data sheet for the mega168 carefully, particularly the
areas of memory access, instruction references and the IO register
descriptions.

I don't know about your particular situation, but many of the newer mega
chips have extended I/O registers (>0x100) which cannot be accessed via
in/out instructions.  The SBI/CBI instructions are limited to the first 32
I/O locations, etc.  So you can have up to three situations:

Sbi/cbi = classic, low 32 bytes of I/O

In rx, REGISTER = classic, upper 32 bytes of I/O
And rx, 0x01
Out REGISTER, rx

Lds rx, memory_location = new: everything else.
And rx, 0x01
Sts memory_location, rx

Depending upon what register you are dealing with.  Make no assumptions
about where grouped registers are located.  Many newer features (extended
timer interrupts, etc) are out in SRAM space since Atmel didn't leave enough
I/O space for the future...

BTW you can use direct memory reference (ld/st, lds/sts) to get to any
register (R0-R31, IO and SRAM) - that can be a very handy feature at times!

I know it is a little weird, but after a while you will begin to appreciate
the tradeoffs that Atmel made when assigning code space to the various
instruction types.

If you want weird, try assembly programming a PIC...

Cheers!

-----Original Message-----
From: AVR-Chat@yahoogroups.com [mailto:AVR-Chat@yahoogroups.com] On Behalf
Of Dennis
Sent: Tuesday, August 23, 2005 3:07 PM
To: AVR-Chat@yahoogroups.com
Subject: Re: [AVR-Chat] Re: mega 168

Changed the code. Using GPIOR0,0 as a flag and a test loop on the register
when the interrupt completes. Works fine.
Found what might be another little problem though. The GPIOR0, 1 and 2
registers are supposed to work with the sbi, cbi, sbis and sbic
instructions. GPIOR0 works fine, the others give me an "operand out of
range" error when I build the code.
Thanks
Dennis
----- Original Message ----- 
From: "John Samperi" <samperi@ampertronics.com.au>
To: <AVR-Chat@yahoogroups.com>
Sent: Tuesday, August 23, 2005 5:01 PM
Subject: Re: [AVR-Chat] Re: mega 168


> At 12:12 AM 24/08/2005, you wrote:
>>Not that I disagree with you, however, look at the RETI for th 8051. Also,
>>check out the RET and RETI instruction explanantion is the instruction set
>>manual. Both of the latter use the same stack operation implying they
>>function the same. RET returns to the instruction following the CALL, RETI
>>does not.
>
> Well there is an easy way to find out, translate your code to 8051
> code and run it in a simulator and see if it works differently to
> the AVR and let us know. I have been working with microprocessors for
> some 25 years and with at least a dozen different families/architectures
> and I haven't seen a processor behave like you expect.
>
> You can use your loop as long as you understand that
>
> loop:
>         rjmp loop
>
> will ALWAYS and regardless of what happens anywhere else jumps
> to itself so that the next instruction to be executed is rjmp loop
>
> If on the other hand you put some code in your loop that tests
> something for true or false and that something can be changed
> by an interrupt then it will work well.
> Let's say you enter your loop with r16=0 and your interrupt
> routine changes it to 1 then you could do the following:
>
> loop:
>         tst r16         ;Check if r16 is still 0
>         brne exit_loop  ;If no longer 0 then exit the loop
>         rjmp loop       ;otherwise keep on waiting
> exit_loop:
>         more instructions
>
> In your code you seem to test portd for some pattern
> put this test within your loop and it will work but
> by having an interrupt just happening will not exit
> a loop.
>
>
> Regards
>
> John Samperi
>
> ******************************************************
>                         Ampertronics Pty. Ltd.
>   11 Brokenwood Place Baulkham Hills, NSW 2153 AUSTRALIA
>          Tel. (02) 9674-6495       Fax (02) 9674-8745
>                Email: samperi@ampertronics.com.au
>                  Website  http://www.ampertronics.com.au
> * Electronic Design   * Custom Products   * Contract Assembly
> ******************************************************
>
>
>
>
>
>
> Yahoo! Groups Links
>
>
>
>
>
>
>





Yahoo! Groups Links












Yahoo! Groups Links












Yahoo! Groups Links

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