AVR-Chat

You need to read the data sheet for the mega168 carefully, particularly the
areas of memory access, instruction references and the IO register
descriptions.

I don't know about your particular situation, but many of the newer mega
chips have extended I/O registers (>0x100) which cannot be accessed via
in/out instructions.  The SBI/CBI instructions are limited to the first 32
I/O locations, etc.  So you can have up to three situations:

Sbi/cbi	= classic, low 32 bytes of I/O

In	rx, REGISTER	= classic, upper 32 bytes of I/O
And	rx, 0x01
Out	REGISTER, rx

Lds	rx, memory_location	= new: everything else.
And	rx, 0x01
Sts	memory_location, rx

Depending upon what register you are dealing with.  Make no assumptions
about where grouped registers are located.  Many newer features (extended
timer interrupts, etc) are out in SRAM space since Atmel didn't leave enough
I/O space for the future...

BTW you can use direct memory reference (ld/st, lds/sts) to get to any
register (R0-R31, IO and SRAM) - that can be a very handy feature at times!

I know it is a little weird, but after a while you will begin to appreciate
the tradeoffs that Atmel made when assigning code space to the various
instruction types.

If you want weird, try assembly programming a PIC...

Cheers! 

-----Original Message-----
From: AVR-Chat@yahoogroups.com [mailto:AVR-Chat@yahoogroups.com] On Behalf
Of Dennis
Sent: Tuesday, August 23, 2005 3:07 PM
To: AVR-Chat@yahoogroups.com
Subject: Re: [AVR-Chat] Re: mega 168

Changed the code. Using GPIOR0,0 as a flag and a test loop on the register 
when the interrupt completes. Works fine.
Found what might be another little problem though. The GPIOR0, 1 and 2 
registers are supposed to work with the sbi, cbi, sbis and sbic 
instructions. GPIOR0 works fine, the others give me an "operand out of 
range" error when I build the code.
Thanks
Dennis
----- Original Message ----- 
From: "John Samperi" <samperi@ampertronics.com.au>
To: <AVR-Chat@yahoogroups.com>
Sent: Tuesday, August 23, 2005 5:01 PM
Subject: Re: [AVR-Chat] Re: mega 168


> At 12:12 AM 24/08/2005, you wrote:
>>Not that I disagree with you, however, look at the RETI for th 8051. Also,
>>check out the RET and RETI instruction explanantion is the instruction set
>>manual. Both of the latter use the same stack operation implying they
>>function the same. RET returns to the instruction following the CALL, RETI
>>does not.
>
> Well there is an easy way to find out, translate your code to 8051
> code and run it in a simulator and see if it works differently to
> the AVR and let us know. I have been working with microprocessors for
> some 25 years and with at least a dozen different families/architectures
> and I haven't seen a processor behave like you expect.
>
> You can use your loop as long as you understand that
>
> loop:
>         rjmp loop
>
> will ALWAYS and regardless of what happens anywhere else jumps
> to itself so that the next instruction to be executed is rjmp loop
>
> If on the other hand you put some code in your loop that tests
> something for true or false and that something can be changed
> by an interrupt then it will work well.
> Let's say you enter your loop with r16=0 and your interrupt
> routine changes it to 1 then you could do the following:
>
> loop:
>         tst r16         ;Check if r16 is still 0
>         brne exit_loop  ;If no longer 0 then exit the loop
>         rjmp loop       ;otherwise keep on waiting
> exit_loop:
>         more instructions
>
> In your code you seem to test portd for some pattern
> put this test within your loop and it will work but
> by having an interrupt just happening will not exit
> a loop.
>
>
> Regards
>
> John Samperi
>
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