Delay control and Delay CV input determine the time interval between the
beginning of the gate input signal and the beginning of the attack phase.
In AR mode, Release cycle begins immediately after Attack cycle completes or
gate signal goes low, whichever occurs first.
In ASR mode, Attack cycle completes and the voltage holds at 100% (5V) until
the gate goes low, then Release cycle begins.
Look at it another way - set the sustain voltage on an ADSR all the way up,
and you have an ASR since the Decay now does nothing.
Dave Bradley
Principal Software Engineer
Engineering Animation, Inc.
daveb@... >
> From: Nathan Alan Hunsicker <nate@...>
>
> I like the design, but can someone give a a detailed explination of how
> this would work? I am only familiar with the standard ADSR EG. -Nate
>
> > From:
> >"David Bivins" <dbivins@...>
> >
> >
> >I LIKE THIS!!! Best so far for me. Anyone else?
> >