Archive of the former Yahoo!Groups mailing list: Homebrew PCBs

Hi Randy,
You are close to being correct here. A picture may help make this more understandable. Attached are three files, named netlist, schematic, and Power Port, which you should open to make this more understandable.
Three exceptions I can think for connecting nets, besides a wire, are related to your layout software. I use Protel and it allows naming nets by placing a label on the net. If two nets are both labeled the same, then they will be connected. Another case is if I use a port, and place an identical port on other nets, they will be connected. A third case is a symbol, often the ground symbol, however others are allowed. A net name is associated with the symbol, and all nets with the same symbol and same name are connected.  On the schematic, there are 10 resistors, all 1K value, named R1 through R10. Each resistor has two leads, numbered 1 or 2 (i.e. R3-1 and R3-2) to keep every connection unique. If we had a 16 pin IC named U1, then the pins would be numbered U1-1 through U1-16. All the lower ends of the resistors (Pin 1 in this case) are connected to the GND net. R1 through R6 are connected using the Power Ground symbol. R7 & R8 are connected to the GND
net using a net label. R9 & R10 are connected to the GND net using a PORT, which was named GND. Protel uses a similar method for naming components, ports, and symbols as shown in the figure called Power Port.jpg. The name GND is associated with the Power Ground Symbol, and a similar method was used for naming all 10 resistors, the other PORTs (named VCC) and the net label. Note that the top end of R5, R6, R9, & R10 are all connected to net VCC by a PORT. The top ends of R1 & R2 are connected to each other, but no name was used, so Protel will assign a name for this net, as will be done with the top ends of R3 & R4, and R7 & R8.

If you look at the figure netlist.jpg, the top portion defines the components, R1 through R10 and provides a value for each component. In some cases other information usually will be included in the component definitions, including a footprint that would be used by the PCB layout software. I did not include a footprint when I drew the schematic, so this netlist would not be very useful in the PCB layout, and in fact would generate a missing footprint error.

The bottom portion of the netlist shows the net names that were either named on the schematic (GND), or named by Protel (NetR1_2, NetR3_2, NetR5_2, and NetR9_1). Note that although we named a net VCC with a PORT, Protel did not use that name, instead it used a name of NetR5-2. If we had used a net label instead of a PORT, the net label name would have been used in the netlist. This may vary between different schematic capture programs, but the important point is that all the components connected to each other, however it is done, have the same unique net name.

I did not show an example here, but if you include a footprint in your component identification on the schematic, then you can open the netlist using your PCB layout software and it will place the footprint on the PCB. For example I could have assigned a 1206 footprint (surface mount) to the resistors, and the PCB layout software would search my footprint library for a 1206 footprint, and if found, would place a copy of it for each resistor using that footprint. I could have assigned a custom footprint that I created to some of the resistors, so some could be through hole resistors, or perhaps an 805 surface mount footprint (smaller than a 1206). The PCB layout program will also create a "spider web" of lines connecting the nets which assist in manually placing traces between pads that should be connected. A set of design rules can be created that will specify the spacing between traces, trace sizes for each net, and many other features too numerous to
list here. PCB layout is another topic so I will not discuss it further here.

Bob Butcher








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