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RE: VC AR EG mockup with Delay

RE: VC AR EG mockup with Delay

2000-02-02 by Dave Bradley

Well, hey - here's one with delay.

Dave Bradley
Principal Software Engineer
Engineering Animation, Inc.
daveb@... 

> From: hodad1@...
> 
> Here's my less-than-informed notion:
> What about a DAR EG?  Eliminate the A/R Cv pot, maybe have a -OUT jack as
> well as a +OUT.
> 
> Is that feasible/sensible etc.?
> 
> tomr
> ----- Original Message -----
> From: Paul Schreiber <synth1@...>
> To: <motm@onelist.com>
> Sent: Wednesday, February 02, 2000 2:41 PM
> Subject: Re: [motm] VC AR EG mockup
> 
> 
> > From: "Paul Schreiber" <synth1@...>
> >
> > This is about 100 times easier to do than a massive VC DADSR super-whiz
> bang
> > module.
> >
> > Everybody like this idea??
> >
> > Paul S.


[This message contained attachments]

RE: VC AR EG mockup with Delay

2000-02-02 by Nathan Alan Hunsicker

I like the design, but can someone give a a detailed explination of how
this would work? I am only familiar with the standard ADSR EG. -Nate
Show quoted textHide quoted text
> From:
>"David Bivins" <dbivins@...>
>
>
>I LIKE THIS!!! Best so far for me. Anyone else?
>
>
>
>> -----Original Message-----
>
>> From: Dave Bradley [mailto:daveb@...]
>
>> Sent: Wednesday, February 02, 2000 1:45 PM
>
>> To: motm@onelist.com
>
>> Subject: RE: [motm] VC AR EG mockup with Delay
>
>>
>
>>
>
>> From: "Dave Bradley" <daveb@...>
>
>>
>
>> Well, hey - here's one with delay.
>
>>
>
>> Dave Bradley
>
>> Principal Software Engineer
>
>> Engineering Animation, Inc.
>
>> daveb@...
>
>>
>
>> > From: hodad1@...
>
>> >
>
>> > Here's my less-than-informed notion:
>
>> > What about a DAR EG?  Eliminate the A/R Cv pot, maybe have a
>
>> -OUT jack as
>
>> > well as a +OUT.
>
>> >
>
>> > Is that feasible/sensible etc.?
>
>> >
>
>> > tomr
>
>> > ----- Original Message -----
>
>> > From: Paul Schreiber <synth1@...>
>
>> > To: <motm@onelist.com>
>
>> > Sent: Wednesday, February 02, 2000 2:41 PM
>
>> > Subject: Re: [motm] VC AR EG mockup
>
>> >
>
>> >
>
>> > > From: "Paul Schreiber" <synth1@...>
>
>> > >
>
>> > > This is about 100 times easier to do than a massive VC DADSR
>
>> super-whiz
>
>> > bang
>
>> > > module.
>
>> > >
>
>> > > Everybody like this idea??
>
>> > >
>
>> > > Paul S.
>
>>
>
>> --------------------------- ONElist Sponsor ----------------------------
>
>>
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RE: VC AR EG mockup with Delay

2000-02-02 by Dave Bradley

Delay control and Delay CV input determine the time interval between the
beginning of the gate input signal and the beginning of the attack phase.

In AR mode, Release cycle begins immediately after Attack cycle completes or
gate signal goes low, whichever occurs first.

In ASR mode, Attack cycle completes and the voltage holds at 100% (5V) until
the gate goes low, then Release cycle begins.

Look at it another way - set the sustain voltage on an ADSR all the way up,
and you have an ASR since the Decay now does nothing.

Dave Bradley
Principal Software Engineer
Engineering Animation, Inc.
daveb@...
Show quoted textHide quoted text
>
> From: Nathan Alan Hunsicker <nate@...>
>
> I like the design, but can someone give a a detailed explination of how
> this would work? I am only familiar with the standard ADSR EG. -Nate
>
> > From:
> >"David Bivins" <dbivins@...>
> >
> >
> >I LIKE THIS!!! Best so far for me. Anyone else?
> >

Re: VC AR EG mockup with Delay

2000-02-02 by Paul & Alleyne

>From: "David Bivins" <dbivins@...>
>
>I LIKE THIS!!! Best so far for me. Anyone else?


hello all
i agree, i think the VC AR EG with delay is the best idea so far (thinks
applying some S&H random cv to the delay input will help me play horribly
out of time with greater efficiency)

by the way - anyone seen that m**g VC delay pedal..?

cheers
paul b

Re: VC AR EG mockup with Delay

2000-02-02 by Nathan Hunsicker

I give my vote for R3 ( with the DAR, D CV, A CV, R CV, Mode Switch Gate
& Out) What would the LED indicate?

David Bivins wrote:

> From: "David Bivins" <dbivins@...>
>
> I LIKE THIS!!! Best so far for me. Anyone else?
>
> > -----Original Message-----
> > From: Dave Bradley [mailto:daveb@...]
> > Sent: Wednesday, February 02, 2000 1:45 PM
> > To: motm@onelist.com
> > Subject: RE: [motm] VC AR EG mockup with Delay
> >
> >
> > From: "Dave Bradley" <daveb@...>
> >
> > Well, hey - here's one with delay.
> >
> > Dave Bradley
> > Principal Software Engineer
> > Engineering Animation, Inc.
> > daveb@...
> >
> > > From: hodad1@...
> > >
> > > Here's my less-than-informed notion:
> > > What about a DAR EG?  Eliminate the A/R Cv pot, maybe have a
> > -OUT jack as
> > > well as a +OUT.
> > >
> > > Is that feasible/sensible etc.?
> > >
> > > tomr
> > > ----- Original Message -----
> > > From: Paul Schreiber <synth1@...>
> > > To: <motm@onelist.com>
> > > Sent: Wednesday, February 02, 2000 2:41 PM
> > > Subject: Re: [motm] VC AR EG mockup
> > >
> > >
> > > > From: "Paul Schreiber" <synth1@...>
> > > >
> > > > This is about 100 times easier to do than a massive VC DADSR
> > super-whiz
> > > bang
> > > > module.
> > > >
> > > > Everybody like this idea??
> > > >
> > > > Paul S.


[This message contained attachments]

RE: VC AR EG mockup with Delay

2000-02-02 by Dave Bradley

LED indicates the presence of a gate signal. EXTREMELY useful in complex
patches as a visual indicator of when your EG is being fired.

Dave

>>>>>>
From: Nathan Hunsicker <nate@...>

I give my vote for R3 ( with the DAR, D CV, A CV, R CV, Mode Switch Gate &
Out) What would the LED indicate?
<<<<<<

RE: VC AR EG mockup with Delay

2000-02-02 by David Bivins

I LIKE THIS!!! Best so far for me. Anyone else?
Show quoted textHide quoted text
> -----Original Message-----
> From: Dave Bradley [mailto:daveb@...]
> Sent: Wednesday, February 02, 2000 1:45 PM
> To: motm@onelist.com
> Subject: RE: [motm] VC AR EG mockup with Delay
>
>
> From: "Dave Bradley" <daveb@...>
>
> Well, hey - here's one with delay.
>
> Dave Bradley
> Principal Software Engineer
> Engineering Animation, Inc.
> daveb@...
>
> > From: hodad1@...
> >
> > Here's my less-than-informed notion:
> > What about a DAR EG?  Eliminate the A/R Cv pot, maybe have a
> -OUT jack as
> > well as a +OUT.
> >
> > Is that feasible/sensible etc.?
> >
> > tomr
> > ----- Original Message -----
> > From: Paul Schreiber <synth1@...>
> > To: <motm@onelist.com>
> > Sent: Wednesday, February 02, 2000 2:41 PM
> > Subject: Re: [motm] VC AR EG mockup
> >
> >
> > > From: "Paul Schreiber" <synth1@...>
> > >
> > > This is about 100 times easier to do than a massive VC DADSR
> super-whiz
> > bang
> > > module.
> > >
> > > Everybody like this idea??
> > >
> > > Paul S.
>
> --------------------------- ONElist Sponsor ----------------------------
>
> Get what you deserve with NextCard Visa. ZERO. Rates as low as 0.0
> percent Intro APR, online balance transfers, Rewards Points, no hidden
> fees, and much more. Get NextCard today and get the credit you deserve.
> Apply now! Get your NextCard Visa at
> <a href=" http://clickme.onelist.com/ad/NextcardCreative6 ">Click Here</a>
>
> ------------------------------------------------------------------------
>
>

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