Lpc2000

--- In lpc2000@yahoogroups.com, Robert Adsett <subscriptions@a...> 
wrote:
> The obvious reason for doing this is to avoid conflicts from 
multiple 
> process (or interrupts).  Other wise you have to maintain shadow 
copies of 
> the outputs and (in an interrupt protected piece of code) update 
the shadow 
> and then the output.  In psuedo code something like:
> 
> disable_interrupts()
> shadow_output = shadow_output & ~PERIPH_MASK    -- zero area to be 
updated
> shadow_output = shadow_output | (new_value & PERIPH_MASK)       -- 
update 
> with new value
> actual_output = shadow_output;
> enable_interrupts()
> 
> Some other micros provide similar facilities.  The ST10 uses a 
construct 
> where a single register affects the I/O bit but maps two bit in the 
> register to each output, one bit patter set the output, a second 
clears the 
> output and the other two cause no effect.  It's also used on 
internal 
> registers to avoid race conditions on bits that may be affected by 
both the 
> peripheral HW and SW.
> 
> Finally note the writeup on the IOPIN register in the user 
manual "Note: 
> for test purposes, writing to this register stores the value in the 
output 
> register, bypassing the need to use both the IOSET
> and IOCLR registers. This feature is of little or no use in an 
application 
> because it is not possible to write to individual bytes in
> this register."
> 
> 
> Robert
> 

Thanks, Robert !
You dispel my doubts.