eml synthesizers

> >Is it based around PLL (4046 or so)?
>
> Sorry I don't know what that means. PLL=Phase lock looped?

Phase locked loop
This thingies are common in such apps, basically they try to
"lock" on input frequency and osc at the same, but they have
overshoots during the process which make those "squaks"...

> I seem to
> recall that term being used in the description but not sure. Perhaps you
> can tell more from the schemo's? I will try to post this weekend.

It'd be interesting for sure...


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marjan


me : Marjan Urekar
e-mail: urekar.m@...
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