SergeModular

Hello all,

I have a question to everybody who uses the Serge BLOG module or who
is otherwise experienced with logic circuits. How can I create an XOR
gate with a "tolerance" feature?

The idea is that the patch should to a certain amount ignore
disparities in the two input voltages and not fire the gate pulse.

Of course the XOR gate itself triggers on any ever so small
disparity. So either have to put the gate output into a VCA and gate
it by means of an extra patch that implements the "tolerance". That
is, the gate pulse is suppressed if the patch decides that the
disparity of the input voltages is tolerable. Any idea how that could
be done?

Or, I could forget about post-gating and just apply some lag to both
the XOR gate's voltage inputs. The slopes would have to be
exponential (i.e. they will take the same time to follow any however
large voltage swing), and the amount of lag would determine the range
of "tolerance". However, I temporarily have no means of trying it
out, and my guts tell me to doubt that this idea will achieve the
desired effect.

Please let me know your thoughts on this. Thanks in advance for all
responses,

Regards

S. Kuehnl

This isn't so simple a problem. As I understand it, the BLOG module is
straight CMOS logic, so input signals will be squared up and essentially
insensitive to how close they are to each other in voltage. You need to
compare the two voltages to each other, and because of the squaring
action the BLOG won't allow you to do this.

The lag method will only work if the input signals are fairly steady
state and unchanging - fixed frequency triangle waves, for instance.
Even so, this will only give an approximation of what you're looking
for.

What you need is something like a window comparator function, but where
the values are set from the relative values of each input. If you have
a dual comparator module, feed input A (was going to BLOG) to the +
input on the first comparator and to the - input on the second
comparator. Feed input B to the - input on the first comparator and the
+ input on the second comparator. Set the manual controls to slightly
positive on both comparator stages. This determines the "spread" or
"tolerance." Take the comparator outputs to an AND gate, and then
invert. This should give what you're looking for, at least according to
my paper estimates. I don't have the modules to try this out. It does
show how useful a comparator module can be.

John Loffink
jloffink@...

Skuehnl writes: