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Message

XOR gate with "tolerance" area

2002-12-21 by skuehnl <skuehnl@yahoo.de>

Hello all,

I have a question to everybody who uses the Serge BLOG module or who
is otherwise experienced with logic circuits. How can I create an XOR
gate with a "tolerance" feature?

The idea is that the patch should to a certain amount ignore
disparities in the two input voltages and not fire the gate pulse.

Of course the XOR gate itself triggers on any ever so small
disparity. So either have to put the gate output into a VCA and gate
it by means of an extra patch that implements the "tolerance". That
is, the gate pulse is suppressed if the patch decides that the
disparity of the input voltages is tolerable. Any idea how that could
be done?

Or, I could forget about post-gating and just apply some lag to both
the XOR gate's voltage inputs. The slopes would have to be
exponential (i.e. they will take the same time to follow any however
large voltage swing), and the amount of lag would determine the range
of "tolerance". However, I temporarily have no means of trying it
out, and my guts tell me to doubt that this idea will achieve the
desired effect.

Please let me know your thoughts on this. Thanks in advance for all
responses,

Regards

S. Kuehnl

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