From: Jose Fuentes
To: AVR-Chat@yahoogroups.com
Sent: Friday, January 14, 2005 3:24 PM
Subject: Re: [AVR-Chat] ADC ACCURACY AND NOISE
I solved some hardware problems and now the ADC is
more stable. This is the source code:
void init_adc(void)
{
ADMUX |= (0x01 << 6);
ADMUX &= (~ (0x01 << 7));
ADCSRA = 0xE0;
DDRA = 0x00;
}
unsigned int read_adc(void)
{
int adc;
adc = (ADCW & 0x03FF);
return adc;
}
I tried to improve the accuracy by lowering the adc
clock:
ADCSRA = 0xE0 | 0x07;//set last 3 bits
that was to set bits ADPS2, ADPS1, ADPS0. Doing that
the prescaler is set to use a division factor of 128.
But it doesn't make the ADC more stable. Actually, it
makes it less accurate, do you know why?
I've just checked my code for M8535. I'm using the default ADC clock
prescaler division value, which is 2 (xtal is 8 MHz), and getting very
stable values. Here's the code, extracted from my test program:
ldi temp,(1<<URSEL)|(1<<USBS)|(3<<UCSZ0);set comms parameters
out UCSRC,temp
sbi ADCSRA,ADEN ;enable ADC
ldi temp,(1<<REFS0)|(1<<REFS1);use AREF, left justify, ADC0
out ADMUX,temp
ldi ZL,low(buffer) ; Load Z register low
ldi ZH,high(buffer) ; Load Z register high
main:
sbi ADCSRA,ADSC ;start conversion
main1:
sbic ADCSRA,ADSC ;ADSC clear?
rjmp main1 ;no, loop back
in rBin1L,ADCL ;read low bits of ADC value
in rBin1H,ADCH ;read high bits of ADC value
lsr rBin1H ;divide 16 bit value by 4 (unsigned)
ror rBin1L
lsr rBin1H
ror rBin1L
rcall Bin2ToAsc5
ldi temp,5
main2:
ld byte,Z+
rcall serout
dec temp
brne main2
rcall new_line
rjmp main ;go round again
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