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Re: Oh, I am so tired of this..

2005-04-08 by alwelch93021

The DRC stopped at too few errors and that is why it missed the 
clearance problems. I increased  the errors on the misc tab and then 
it did find the shorts. In fact it found a second one i had not 
uncovered yet.  

Al Welch

--- In AVR-Chat@yahoogroups.com, "Jesper Hansen" <jesperh@t...> 
wrote:
> I have no problem in running the STK-500 without a target.
> It must be something else that is causing your problem.
> 
> I look forward to hear more about the Eagle problem. I've been 
using
> Eagle for about 3 years and made a lot of boards without noticing
> such a problem. But I layout manually, so I wouldn't route such an
> error (pounding chest). However, I have been routing too close to
> vias sometimes, and the DRC always have found that. Perhaps it
> is something in your DRC check setup ?
> 
> /Jesper
> 
> 
> ----- Original Message ----- 
> From: "alwelch93021" <alwelch@a...>
> To: <AVR-Chat@yahoogroups.com>
> Sent: Thursday, April 07, 2005 8:21 PM
> Subject: [AVR-Chat] Re: Oh, I am so tired of this..
> 
> 
> > 
> > 
> > I have found my problem (I think) and learned something about 
the 
> > STK500 as well.
> > 
> > First of all, the STK500 can not even read back the firmware 
version 
> > unless you have a working target attached.  This is strange to 
me as 
> > It leaves you with no way to even test the rs232 comms to the 
skt500 
> > until you have a fully working target attached!
> > 
> > What i found on my new prototype is the EagleCad software routed 
two 
> > traces (sclk and mosi) right over the top of a GND via that was 
> > placed to ground some SMD caps on the top side to the ground 
plane. 
> > Thus the sclk and mosi are grounded.  Running the DRC error 
check on 
> > the board does not even detect the problem!  I plan on emailing 
the 
> > board files to support to ask why it fails to note the traces 
are 
> > laying on top of the GND via! At least the traces are on the 
bottom 
> > side of the board and can be fixed with the exacto knife, etc.
> > 
> > BTW I measured the voltages on the STK500 at those electrolytic 
caps 
> > on the MAX202 as suggested by others here and sure enough some 
had 7 
> > volts and some were way down to just a few volts. I will replace 
> > with some 10UFD 25V X5R 1210 parts i have.
> > 
> > Al Welch
> > 
> > --- In AVR-Chat@yahoogroups.com, "Larry Barello" <yahoo@b...> 
wrote:
> >> Have you checked that your JTAG clock is < 1/4 your system 
clock?  
> > Is your
> >> system clock working properly?  Are you sure?  Can you use the 
> > AVRISP/STK500
> >> to check?
> >> 
> >> -----Original Message-----
> >> From: alwelch93021
> >> 
> >> 
> >> The problem for me is that I have no clue as to what the 
solution 
> > is.
> >> Is there some problem with the way I designed my board for the 
> > ISP6pin
> >> and  the JTAG signals. I doublt it as I changed nothing since 
the 
> > last
> >> prototyp in that area AND the last pcb had that day last week 
> > where it
> >> worked after not working for hours in terms of  the tools! The 
deal
> >> yesterday where JTAG indiated it downloaded the program.. 
showed 
> > the
> >> progress bar move along and  then spin away with the auto 
program
> >> status and never stopped at entry point. That makes me think the
> >> problem is in the tools and no where else.
> >> 
> >> I really need to get my program loaded and move on but have no 
> > qlue as
> >> to what to do other than stare at it some more today.
> >> 
> >> Al
> > 
> > 
> > 
> > 
> > 
> > 
> > Yahoo! Groups Links
> > 
> > 
> > 
> > 
> > 
> > 
> > 
> >

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