Re: [68300] Re: 68332 SDRAM interface
2003-04-07 by Robert Layton
Below is the answer which I got from Motorola when I asked them the same question recently ( the E20 refers to one of the 68332 chips ) : Dear Robert Layton,
Yahoo Groups archive
Messages
Page 6 of 12 · 553 messages matched
2003-04-07 by Robert Layton
Below is the answer which I got from Motorola when I asked them the same question recently ( the E20 refers to one of the 68332 chips ) : Dear Robert Layton,
2003-04-07 by jeffreyslcu
If you are starting out with a new project, you might want to think twice about using the 68332. I am using part MC68332GCFC16 and it allegedly has an
2003-04-07 by shyam_mali
Hi, I am a newcomer in this group and also a beginner in the 68000 series microcontrollers. I am looking forward to using the 68332. I am looking for some
2003-04-07 by jeffrey.tenney@gm.com
Are you using an OS? Can you service any interrupts at all, including internal interrupts? Jeff wflsa on 04/06/2003 09:18:16 PM Please
2003-04-07 by Melear Charles-rdph40
Hello, Please give some more details on your problem. I am simply guessing on this but if your program is simply halting (or appears to halt) when an
2003-04-07 by wflsa
I hope use Interrupt server program in IRQ pin of the MC68376. when a low level is generated, MCU is call my specify server program. Now, I generate a low
2003-04-02 by Melear Charles-rdph40
Robert, I do not read C code very well but there is one thing that I have learned to look for. In one of the last lines in your code, you do something to the
2003-03-31 by Robert Yablonski
Hello Group, We have a TPU problem. When using the PTA function, in Mode 3 we sometimes get a reading that is 1/2 the actual period Plus 1035+-1. The
2003-03-26 by Andrei Chichak
Hi All, This was going to be a message regarding SWT timing, but I figured it out. But I found a documentation error in the mean time. MC68332UM/AD Page D-12
2003-03-20 by Jose Lopez
Alwin, I ve never had to do this before, but I believe you can probably do this using the OC and PPWA functions. Take a look at this application note:
2003-03-20 by Alwin Lutz
Thanks Andrei, One of the solutions I am thinking about would be similar to the one you suggested. In effect, I would use the ITC to generate an interrupt and
2003-03-20 by Andrei Chichak
What you have is similar to what is needed for the ITC and PSP functions. This is similar to what happens in an automotive fuel injection system. The problem
2003-03-20 by Robert Smith
The straight forward way is to program one channel for the input pulse and one for the output pulse. The communicate between the two in the interrupt handlers.
2003-03-20 by Alwin Lutz
Hello group, does anybody of you guys know of some nifty way to solve the following problem: I have an incoming signal (low pulse with a period T1) at one TPU
2003-03-19 by jeffrey.tenney@gm.com
Erik, Yes, it s user defined (within limits). Write to the Bus Interface Unit s MCR to set the base interrupt vector for the CTM4. PWM5 would use vector
2003-03-19 by Erik Wise
I am having trouble setting up the interrupt that will fire after completion of each pwm period. I previously posted but made a mistake when I said that I was
2003-03-07 by Iain A B Lindsay
Perhaps there is confusion between word/longword adressing (which has very little to do with the address bus, apart from alignment restrictions) and the
2003-03-07 by Allen Nance
Hello Again: I found the problem. Yes, the TPU emulation does work on the 68LK332. I had a bug in my old code that for some strange reason didn t show up on
2003-03-07 by Allen Nance
Hello group: Has anyone used the TPU emulation RAM as TPU code space on the 68LK332 (3V part)? Should it work? I have an application which runs on a 5V part
2003-03-05 by jeffrey.tenney@gm.com
John, You can review the addressing modes (direct, indirect, absolute, etc.) of the CPU32 in the CPU32RM, chapter 3. However, the CPU32 does not do memory
2003-03-05 by Robert Layton
Erik, If you are using C, I have some header and initialization files which may be useful in describing and using the TPU. Please let me know. Regards, Robert
2003-03-05 by Melear Charles-rdph40
John, Bye the bye, LEA only has a 32-bit form, i.e., it always uses Long Word addressing. Also, move.l also forces Long word addressing because a 32-bit
2003-03-05 by Melear Charles-rdph40
John, Purely from a software / compiler standpoint, a C compiler treats the CPU32 as a 32-bit address machine. So, you will see instructions that use the full
2003-03-05 by John Mermigis
First of all the TPU issues one interrupt of its own and internally administers of which channel sould that be If I remember well (I don t have the manual at
2003-03-05 by John Mermigis
First of all thank you all Guys for your interest in my question Actually, I did mention that this was a purely theoretical question, I have already solved the
2003-03-04 by Erik Wise
Presently I am using a TPU Channel to generate a PWM signal, and it works as I would like. However, if possible I would like an interrupt to be generated on
2003-03-04 by Melear Charles-rdph40
Jeff, I am just a hardware guy. I know in the past that this .w vs .l addressing has cropped up and that it was solved by specifically adding the .l ,
2003-03-04 by jeffrey.tenney@gm.com
Charlie, I am shocked that any assembler would default to word addressing for the instruction example you give, MOVE.B #$12, (A0) especially if you re saying
2003-03-04 by Melear Charles-rdph40
Dimiter, You are right about self-respecting compilers. However, there are several legal modes of operation that can be specified here. Consider this
2003-03-04 by Dimiter Popoff
Any self-respecting compiler or assembler should issue an error message if one tries to fit into a word an address bigger than that (notice that the 68K family
2003-03-04 by Melear Charles-rdph40
Hello everyone, When I receive questions like this, I try to offer simple answers that seem to trick a lot of people. Many compilers default to word length
2003-03-04 by johnmerm <iomer@egnatia.ee.auth.gr>
Could somebody explain to me why a Bus error exception shall occur when commands like MOVE.L (_BlaBla),A1 or ADD.L A2,(_Blabla) Well it seems the problem is
2003-02-19 by Jose Lopez
List, I m using the QSPI to talk to a D/A and it s not working the way I would expect it to. The QSPI is configured for wrap-around mode and the interrupts are
2003-02-11 by Scott Newell
... Nevermind...that s obviously not gonna work, cause you re back to the 64/32 bit divide again. Sorry, guess I shouldn t try to do mental math first thing
2003-02-11 by Scott Newell
... Can you... divide the high 32 by divisor, shift the quotient and remainder 32 bits left, add the low 32 to the shifted remainder, divide again, and sum the
2003-02-11 by Melear Charles-rdph40
Hello everyone, A priviledge violation is created when an attempt is made to execute a Privileged Instruction when the CPU is in the USER (as opposed to
2003-02-11 by Dimiter Popoff
Hi all, I have written an assembler (or is it a compiler?) which produces power PC code from CPU32 sources (and more than that, but this is another topic). To
2003-02-11 by Dimiter Popoff
Hi all, I have written an assembler (or is it a compiler?) which produces power PC code from CPU32 sources (and more than that, but this is another topic). To
2003-02-11 by johnmerm <iomer@egnatia.ee.auth.gr>
As the subject indicates, I get one Internal.... What could probably cause this to happen And in genereal what is the diference between Internal whatever
2003-02-06 by Mark Wyman
Hi all, I started a user group for the few of us who are using Introl C tools for Motorola processors rather than the other available perfectly good tools. You
2003-02-02 by Jose Lopez
I had mine set to ICD1 , 200 and it still did it. ... _________________________________________________________________ Add photos to your e-mail with MSN
2003-02-02 by thisobj <fvolker@yhti.net>
With BD32, there were continuous errors on opening the program until I changed the 2 lines in the BD32.CFG file to ICD1 , 1 . This file previously contained
2003-02-02 by Jose Lopez
This also happened on the NT machine. Did BD32 give you a bunch of errors before it opened? ...
2003-02-02 by thisobj <fvolker@yhti.net>
Jeff, For the variable duty cycle (PWM type) function using QOM: It is probably best to simply write the new on interval parameters into the parameter RAM
2003-02-02 by thisobj <fvolker@yhti.net>
BD32 seems to work okay on XP. It (XP) generates an interface task called NTVDM.EXE for each DOS window. The bad news is that BD32 hogs about 99% of the
2003-01-31 by Jose Lopez
List, The good news is, after ignoring ~15 error messages, BD32 successfully loaded the S-record using the NT machine (400Mhz PII). The .cgf file contained the
2003-01-28 by Andrei Chichak
In my day job I use DIAB DCC and SDS with either a Macraigor wiggler or a P&E ICD. They work. We tried CodeWarrior but (2 years ago) it wouldn t do things like
2003-01-28 by Robert Manktelow
Hello All This posting reminded me of our attempts to get the GNU source level debugger working under Windows NT with an ARM7 target a while ago. We, like
2003-01-28 by morbacharno <morbach-arno@web.de>
... has ... systems ... I did it once. There is a driver called rainport, which you can install. It redirects io accesses to a proper function which does the
2003-01-27 by Aaron J. Grier
... it s not built into gcc. there have been patches floating around to add __attribute__ ((interrupt)) support for 68k, but as far as I know, they haven t