68300

jeffrey.tenney,\ufffd\ufffd\ufffd�\ufffd
 	Charles once said to me:
	Question: I use 68332 at 25M clk,do I need to select a high speed memory chip?Is it enough
if I use 70ns speed chip? 
    Answer: I believe that the minimum access time is two full S-clock cycles.  The S-clock is 
essentially equal to the internal bus speed.  I have not gone through the calculations but I 
believe that you actually need 80 ns. memory to run with no wait states at 25 MHZ  (40 ns period).  
Anyway, 70 ns would do.

	I use 70ns memory chip in my system(DSACK set to internal,no wait state)it works ok.But I don't 
use the fast termination mode.

	

======= 2004-06-24 09:38:00 \ufffd\ufffd\ufffd\ufffd\ufffd\ufffd\ufffd\ufffd\ufffd\ufffd\u0434\ufffd\ufffd\ufffd\ufffd=======

>Ivo,
>
>Yes, you have a problem.  You'll need one wait state (not zero) to use 70ns
>memory with a 25MHz '332.
>
>As your tool tells you, zero wait states require 55ns memory or faster.
>
>Fast-Termination mode requires 15ns memory or faster.
>
>For our 25MHz 683xx designs, we use Alliance parts
>(http://www.alsc.com/products/fastasync.htm).  We always choose a 15nS part
>so we can use Fast-Termination cycles.  Their stuff works great.
>
>Jeff
>
>
>
>|---------+---------------------------->
>|         |           "Ivo Strebel"    |
>|         |           <Ivo.Strebel@schi|
>|         |           ller.ch>         |
>|         |                            |
>|         |           06/24/2004 07:47 |
>|         |           AM               |
>|         |           Please respond to|
>|         |           68300            |
>|         |                            |
>|---------+---------------------------->
>  >------------------------------------------------------------------------------------------------------------------------------|
>  |                                                                                                                              |
>  |       To:       <68300@yahoogroups.com>                                                                                      |
>  |       cc:                                                                                                                    |
>  |       Subject:  [68300] Memory Access Time                                                                                   |
>  >------------------------------------------------------------------------------------------------------------------------------|
>
>
>
>
>Hello All,
>
>Do I have a problem?
>
>Hardware:
>CPU:    68332GCPV25 (it runs at 25MHz)
>RAM:    2 * BS62LV2000 (Chip-select access time = (must be)70ns)
>Register:
>DSACK:  0
>Used-Signals:
>Databus:    D0-15
>Adressbus:  A1-A18
>CS: CS0  (low byte)
>    CS1  (high byte)
>
>My system is running great, but there is following insecurity:
>
>WS = 0
>tcyc=39.7ns
>Chip-select access time (MCU Read cycle) = (2+WS) * tcyc * tclsa(max)
>-tdicl(min)
>Chip-select access time (MCU Read cycle) =  55.4ns
>
>I measured the signal CS0/CS1 several time and the width seems to be stable
>at
>80 ns (2*tcyc). According to which circumstances will the CS signal be
>55.4ns?
>Will it ever be? Do I really have to add a wait-state  (I am reliant on the
>speed).
>If the CS0/CS1 drops down under 70ns, I would run in to deep problems.
>Which SRAM do you guys use at 25 MHz.
>
>Thx Ivo Strebel
>
>
>
>
>---------------------------------------------------To learn more about
>Motorola Microcontrollers, please visit
>http://www.motorola.com/mcu
>
>learn more about Motorola Microcontrollers, please visit
>http://www.motorola.com/mcu
>
>
>Yahoo! Groups Links
>
>
>
>
>
>
>
>
>
>
>
>
>
>---------------------------------------------------To learn more about Motorola Microcontrollers, please visit
>http://www.motorola.com/mcu
>
>learn more about Motorola Microcontrollers, please visit
>http://www.motorola.com/mcu
>
> 
>Yahoo! Groups Links
>
>
>
> 

= = = = = = = = = = = = = = = = = = = =
			

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\ufffd\ufffd\ufffd\ufffd\ufffd\ufffd\ufffd\ufffd\ufffd\ufffd\ufffd\ufffd\ufffd\ufffd\ufffd\ufffd\ufffd\ufffd\ufffd\ufffd2004-06-25