[sdiy] Single chip digital delay
Antti Huovilainen
ajhuovil at cc.hut.fi
Fri Jan 27 14:27:57 CET 2006
On Fri, 27 Jan 2006, Seb Francis wrote:
> Do you mean by CODEC, a combined ADC and DAC? I hadn't even thought about
Yes. Cheaper and less trouble than separate ADC & DAC. There is some
quality cost but it's unlikely you could get true 100 dB SNR without prior
mixed signal experience anyway.
> The problem with using a dsPIC is I have only a Picstart Plus which can't
> program them. But I think a PIC18FXXX would be enough for my simple delay
The main issue here is interfacing. You REALLY want constant reliable
timing. dsPIC's codec interface would handle that automatically.
If the adc & dac have internal oversampling, processing power is a
non-issue.
> Both have SPI interface so it would be easy to interface them with a PIC, but
> I'm a bit confused about the amount of oversampling needed for the DAC.
> These DACs support up to 16x or 8x oversampling respectively. Does this mean
> they can effectively be driven up to 16x 48kHz? There doesn't seem to be a
That depends on whether it has internal oversampling or not. Preferably
you'd want both ADC & DAC to have internal oversampling. Manual
oversampling (2-4x) is also possible, but you pretty much need dsPIC or
other dsp for that.
> the maths based on the SPI max clock rate it looks like they mean 16x 48kHz.
> Where am I going to get all this data from? The max data I will have from
> the ADC will be at 96kHz, and even then I'd prefer only to store half of it
> (48kHz). How is this oversampling data generated?
You downsample the input and upsample the output. In practise this means
zero-stuffing and FIR filtering = lots of multiplications = DSP.
Or you can just get a codec that does it automatically.
Antti
"No boom today. Boom tomorrow. There's always a boom tomorrow"
-- Lt. Cmdr. Ivanova
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