[sdiy] DROID3, Another AVR Synth?

[ASSI]

On Samstag, 11. Februar 2006 02:53, karl dalen wrote:
> > Re-flashing does
> > help with curing a potential (intrinsic) retention fail. Bits that
> > fail due to cycling (or wear-out) are an entirely different
> > problem, even though some of them may show up as (extrinsic)
> > retention fails.
>
> Is that then a process dependant filure cause, or?

No, at least not along the line you seem to be thinking of. The general 
assumption is that all manufacturing defects are removed during test, 
so the defects due to wear-out are not directly process related. The 
distinction between intrinsic (what the median of some large population 
does and what the distribution is) and extrinsic (what systems do that 
fall outside that distribution) is due to the need to employ different 
statistical models.

> The difference between TI's 100 years and Atmels 10 years is quite
> vast!

Yeah, and it's some of the biggest marketing bullshit I've ever seen (I 
think you refer to the MSP430 datasheets). Welcome to the world of 
Arrhenius' law: draw a diagram log10(t) over 1000/T (T in Kelvin!). 
25°C is then around 3.35, 85°C at 2.79 and 250°C is at 1.91. 100 years 
with some margin is 10^6 hours. Now we don't know their activation 
energy but let's say TI tests the Flash at 250°C and it fails after 
four days at that temperature: 10^2 hours. Draw a straight line between 
those two points and read the time at 85°C: 6-2=4 decades over 1.44 
makes 6-4.44=1.56 decades over 0.56 and that is some 30000 hours. 
Suddenly doesn't look so good anymore, eh? Give them the benefit of 
doubt and say that they'd really make 10^7 hours at RT (which is not 
too outrageous) and guarantee just 100 years to have some margin and 
you get just over 11 years retention time at 85°C, which is then 
equivalent to the Atmel spec (which I didn't read).

Physics is the same for all Flash memories and refuses to bow to the 
will of marketing. Unfortunately customers still get confused. The fact 
is one could qualify such a memory for 100 of data retention under 
worst case conditions if you throw enough money and engineering at it. 
No manufacturer in their right mind will however specify any longer 
time than what the market pays for as the cost function involved is an 
exponential. Under typical conditions any modern technology has 
retention times far longer than the system lifetime. Put differently, 
the failure rate due to retention is an insignificant part of the 
overall failure rate. If you worry about your MCU working in 20 years, 
you need to know the FIT rate (failure in time: how many chips fail 
until 10^9 seconds of lifetime). But then again, unless you have 
millions of those systems in the field, that number is of no 
consequence to you for the typical values you can expect. The chances 
to kill the MCU earlier than the extrapolated lifetime by some 
haphazard event are much greater, IMHO.


Achim.
-- 
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