[sdiy] DROID3, Another AVR Synth?
ASSI
Stromeko at Compuserve.DE
Thu Feb 9 21:15:31 CET 2006
On Donnerstag, 9. Februar 2006 17:53, karl dalen wrote:
> -- just re-flash the thing.
>
> Its not that easy, when flash memories starts to detoriate
> they lose segments and individual bits,
You seem to confuse cycling endurance with retention. Re-flashing does
help with curing a potential (intrinsic) retention fail. Bits that fail
due to cycling (or wear-out) are an entirely different problem, even
though some of them myy show up as (extrinsic) retention fails.
> re- flash dont help
> because 99% of the embedded MCU meories does not contain
> a faulty bits information as NAND flash does.
Many MCU incorporate redundancy at the word level to do single error
correction, so a single weak bit here and there is not a problem. Most
NAND Flash does not include error correction inside the memory, this is
normally implemented in the controller circuitry. For NAND this is
quite easy as you can employ very efficient block ECC like those used
for magnetic and optical storage.
> However im still intressted to hear what folks
> have to say regarding the 10 years of data
> retendention!
As with everything, you have to read the fine print (you'd need to get
hold of the qualification report). What's the failure rate this number
is specified at? What temperature profile over lifetime is assumed? Can
you cycle the memory to the hilt and still enjoy the specified
retention? Does that figure include any built-in error correction or is
it for the raw bits?
Normally the problem with specifying long retention times is that it
becomes exceedingly expensive to demonstrate that performance during
qualification and monitor the production accordingly, especially
considering the comparatively small memory sizes in an MCU.
> (flame shields up, just in case)
Nah, too easy a target. :-)
Achim.
--
+<[Q+ Matrix-12 WAVE#46 Neuron microQkb Andromeda XTk sonic heaven]>+
Waldorf MIDI Implementation & additional documentation:
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