[sdiy] Frequecy Divisor Question (TTL pulse stretcher needed)

[David Cornutt]

Hmmm...  by the time that 5 ns pulse gets done propogating around the
board to all of the places it needs to go, the signal probably looks
kind of nasty.  As I recall the 74F series is somewhat like ECL in that
it's more of a current-switching than a voltage-switching circuitry.

This means the interconnects start to act like transmission lines.  You
may have standing waves messing up the waveform.  It could be
sensitive to the specific layout of the board traces and so forth.
You might want to try experimenting with putting a line termination
resistor in parallel with the monostable's input.  I'm thinking about
what would be an appropriate load resistance; start with about
5K and work your way down?  Any suggestions from someone
who's a better EE than me?  When I was at Gould in the mid-80s
and they did everything in ECL, they used terminating resistors
of 50-100 ohms on nearly every trace on each board.  And they
had a bunch of rules for how to lay out the board, too.  (No test
points; they act like little antennas... drove the FCC people crazy...)