injecting an external 4 MHz clk into LPC2000, and using PLL - anyone done similar ?
2004-05-08 by microbit
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2004-05-08 by microbit
2004-05-10 by embeddedjanitor
In some place in the datasheet, the external xtal is specified as 10 to 25MHz. There might be problems trying to get the PLL running properly off a 4MHz clock. If you need a 4MHz clock for some other part of your board then perhaps you can generate this out of the LPC2119. --- In lpc2000@yahoogroups.com, "microbit" <microbit@c...> wrote: > Hi All, > > This might have come up before I think, but I can't seem to > readily find it in my LPC2000 folder. > > Has anyone ever tried supplying LPC2000 with an external 4 MHz > clock signal, to be used with PLL at higher clock rates ? > > Since it's a full swing Ext signal, I don't see any limitations, other
> than the osc buffer ckty, which surely should handle that. > I'm thinking of multiplying up to 64 MHz cclk.. a tad too high. > And 8 X = 32 MHz is too low. > This is for LPC2119/29. > Space is critical and I need to save an SMT Xtal real estate wise. > > -- Kris
2004-05-10 by microbit
2004-05-10 by Bill Knight
Kris One quick point. The LPC does not like a rail-to-rail input clock. I believe the max level is the same as the core voltage (1.8v) and the minimum is 200mV. Also, the signal should be capacitively coupled. It probably wouldn't hurt if you had the RTCLK signal pinned out on your JTAG connector either and used it. Otherwise debugging is going to be very slow. -Bill the ARM Patch
2004-05-10 by tphatrapornnant
Hi, As I remember, I used to try 2.0 MHz crystal oscilator but it seemed PLL can't work at lower than 10MHz. I have just tested by changing OSC from now 10 MHz to 2 MHz with 6 time multiplier. The 1 ms interrupt timer changed to 1.8 ms, it should be 5 ms. So, I afraid it doesn't work at 4 MHz. Teera. --- In lpc2000@yahoogroups.com, "microbit" <microbit@c...> wrote: > Hi All, > > This might have come up before I think, but I can't seem to > readily find it in my LPC2000 folder. > > Has anyone ever tried supplying LPC2000 with an external 4 MHz > clock signal, to be used with PLL at higher clock rates ? > > Since it's a full swing Ext signal, I don't see any limitations, other
> than the osc buffer ckty, which surely should handle that. > I'm thinking of multiplying up to 64 MHz cclk.. a tad too high. > And 8 X = 32 MHz is too low. > This is for LPC2119/29. > Space is critical and I need to save an SMT Xtal real estate wise. > > -- Kris
2004-05-11 by philips_apps
"Crystal Oscillator" section in the "System Control Block" chapter of the LPC2114/2124/2212/2214 and LPC2119/2129/2194/2292/2294 User Manuals covers input frequency range topics. If on-chip PLL system or boot-loader is used, input clock frequency is limited to exclusive range of 10 MHz to 25 Mhz. These restrictions are imposed by the design of the PLL circuitary. Since all Philips LPC2000 parts have the same PLL module, above requirements exist in the case of LPC2104/5/6 parts, too. Regards, Philips Apps Team --- In lpc2000@yahoogroups.com, "tphatrapornnant" <tp35@l...> wrote: > Hi, > > As I remember, I used to try 2.0 MHz crystal oscilator but it seemed > PLL can't work at lower than 10MHz. I have just tested by changing > OSC from now 10 MHz to 2 MHz with 6 time multiplier. The 1 ms > interrupt timer changed to 1.8 ms, it should be 5 ms. So, I afraid it
> doesn't work at 4 MHz. > > Teera. > > --- In lpc2000@yahoogroups.com, "microbit" <microbit@c...> wrote: > > Hi All, > > > > This might have come up before I think, but I can't seem to > > readily find it in my LPC2000 folder. > > > > Has anyone ever tried supplying LPC2000 with an external 4 MHz > > clock signal, to be used with PLL at higher clock rates ? > > > > Since it's a full swing Ext signal, I don't see any limitations, > other > > than the osc buffer ckty, which surely should handle that. > > I'm thinking of multiplying up to 64 MHz cclk.. a tad too high. > > And 8 X = 32 MHz is too low. > > This is for LPC2119/29. > > Space is critical and I need to save an SMT Xtal real estate wise. > > > > -- Kris
2004-05-12 by slawcus
I haven't noticed this in datasheet: Can I drive X1 with low speed external clock without PLL, then change X1 frequency on the fly and after that use PLL? Example: PDIUSBD12 CLKOUT - default is 4MHz (I'm aware of voltage limitation at X1 of LPC device). LPC2106 X1 is driven by this 4MHz, during PDIUSBD12 setup change CLKOUT to the higher value > 10MHz. Turn on the PLL, continoue with normal operation. PDIUSBD12 CLKOUT change should be without glitches and frequency is not changed with USB reset (according to datasheet). Is this possible? --- In lpc2000@yahoogroups.com, "philips_apps" <philips_apps@y...> wrote:
> "Crystal Oscillator" section in the "System Control Block" chapter of > the LPC2114/2124/2212/2214 and LPC2119/2129/2194/2292/2294 User > Manuals covers input frequency range topics. > > If on-chip PLL system or boot-loader is used, input clock frequency > is limited to exclusive range of 10 MHz to 25 Mhz. > > These restrictions are imposed by the design of the PLL circuitary. > Since all Philips LPC2000 parts have the same PLL module, above > requirements exist in the case of LPC2104/5/6 parts, too. > > Regards, > > Philips Apps Team > > > > --- In lpc2000@yahoogroups.com, "tphatrapornnant" <tp35@l...> wrote: > > Hi, > > > > As I remember, I used to try 2.0 MHz crystal oscilator but it > seemed > > PLL can't work at lower than 10MHz. I have just tested by changing > > OSC from now 10 MHz to 2 MHz with 6 time multiplier. The 1 ms > > interrupt timer changed to 1.8 ms, it should be 5 ms. So, I afraid > it > > doesn't work at 4 MHz. > > > > Teera. > > > > --- In lpc2000@yahoogroups.com, "microbit" <microbit@c...> wrote: > > > Hi All, > > > > > > This might have come up before I think, but I can't seem to > > > readily find it in my LPC2000 folder. > > > > > > Has anyone ever tried supplying LPC2000 with an external 4 MHz > > > clock signal, to be used with PLL at higher clock rates ? > > > > > > Since it's a full swing Ext signal, I don't see any limitations, > > other > > > than the osc buffer ckty, which surely should handle that. > > > I'm thinking of multiplying up to 64 MHz cclk.. a tad too high. > > > And 8 X = 32 MHz is too low. > > > This is for LPC2119/29. > > > Space is critical and I need to save an SMT Xtal real estate wise. > > > > > > -- Kris
2004-05-12 by microbit
Hi Bill, Thanks for the tip ! I was still at concept stage and that hadn't occured to me yet :-) -- Kris ----- Original Message ----- From: "Bill Knight" <BillK@...> To: <lpc2000@yahoogroups.com> Sent: Monday, May 10, 2004 9:02 PM Subject: Re: [lpc2000] Re: injecting an external 4 MHz clk into LPC2000, and using PLL - anyone done similar ?
> Kris > One quick point. The LPC does not like a rail-to-rail > input clock. I believe the max level is the same as the > core voltage (1.8v) and the minimum is 200mV. Also, the > signal should be capacitively coupled. > It probably wouldn't hurt if you had the RTCLK signal > pinned out on your JTAG connector either and used it. > Otherwise debugging is going to be very slow. > > -Bill > the ARM Patch
2004-05-13 by microbit
> If on-chip PLL system or boot-loader is used, input clock frequency > is limited to exclusive range of 10 MHz to 25 Mhz. > > These restrictions are imposed by the design of the PLL circuitary. > Since all Philips LPC2000 parts have the same PLL module, above > requirements exist in the case of LPC2104/5/6 parts, too. > > Regards, > > Philips Apps Team Ok, so it's the ref. input on the phase comparator that's the limiting factor, or similar. That makes sense now. Thanks ! -- Kris
2004-05-13 by philips_apps
Hello Slawcus, Philips has not conducted test(s) that would exactly match what you have described in the post, however if proper PLL setup & connect scheme are applied, we expect no problems. As long as the transition from one clock to another is kept glitch-free on the X1, and all side effects are taken in consideration prior to the design (i.e. impact on all of the on-chip peripherals), you are safe. Regards, Philips Apps Team --- In lpc2000@yahoogroups.com, "slawcus" <slawcus@y...> wrote: > I haven't noticed this in datasheet: > > Can I drive X1 with low speed external clock without PLL, then change > X1 frequency on the fly and after that use PLL? > > Example: PDIUSBD12 CLKOUT - default is 4MHz (I'm aware of voltage > limitation at X1 of LPC device). > LPC2106 X1 is driven by this 4MHz, during PDIUSBD12 setup change > CLKOUT to the higher value > 10MHz. Turn on the PLL, continoue with > normal operation. PDIUSBD12 CLKOUT change should be without glitches > and frequency is not changed with USB reset (according to datasheet). > > Is this possible? > > > > > --- In lpc2000@yahoogroups.com, "philips_apps" <philips_apps@y...> wrote: > > "Crystal Oscillator" section in the "System Control Block" chapter of > > the LPC2114/2124/2212/2214 and LPC2119/2129/2194/2292/2294 User > > Manuals covers input frequency range topics. > > > > If on-chip PLL system or boot-loader is used, input clock frequency > > is limited to exclusive range of 10 MHz to 25 Mhz. > > > > These restrictions are imposed by the design of the PLL circuitary. > > Since all Philips LPC2000 parts have the same PLL module, above > > requirements exist in the case of LPC2104/5/6 parts, too. > > > > Regards, > > > > Philips Apps Team > > > > > > > > --- In lpc2000@yahoogroups.com, "tphatrapornnant" <tp35@l...> wrote: > > > Hi, > > > > > > As I remember, I used to try 2.0 MHz crystal oscilator but it > > seemed > > > PLL can't work at lower than 10MHz. I have just tested by changing > > > OSC from now 10 MHz to 2 MHz with 6 time multiplier. The 1 ms > > > interrupt timer changed to 1.8 ms, it should be 5 ms. So, I afraid > > it > > > doesn't work at 4 MHz. > > > > > > Teera. > > > > > > --- In lpc2000@yahoogroups.com, "microbit" <microbit@c...> wrote: > > > > Hi All, > > > > > > > > This might have come up before I think, but I can't seem to > > > > readily find it in my LPC2000 folder. > > > > > > > > Has anyone ever tried supplying LPC2000 with an external 4 MHz > > > > clock signal, to be used with PLL at higher clock rates ? > > > > > > > > Since it's a full swing Ext signal, I don't see any limitations, > > > other > > > > than the osc buffer ckty, which surely should handle that. > > > > I'm thinking of multiplying up to 64 MHz cclk.. a tad too high. > > > > And 8 X = 32 MHz is too low. > > > > This is for LPC2119/29. > > > > Space is critical and I need to save an SMT Xtal real estate wise. > > > > > > > > -- Kris