On Sunday 18 December 2005 14:00, Tom Walsh wrote: > There seems to be a lot of interest on this list at developing an open > source wiggler gdb tcp server. Something to replace the OCDaemon. > While I find that an intriguing idea with a lot of merit, the weakest > point is still the wiggler electronics and that of the parallel port > electronics. The parallel port of a computer is a relatively low-speed > device, it is not required of it to run megabits of data down to a > printer. Therefore, IMO, the chipsets used for a parallel port are > garbage-variety electronics. My project has been designed from ground up to be able to support different JTAG interfaces. Currently, it supports Wigglers, the FTDI FT2232C and a new configuration for the Amontec Chameleon Dongle (not yet released, but works really fine - ARM7TDMI RAM download at 60-70kByte/s). I've never used a real wiggler or a homemade one, so I don't know about the problems with these, but the Amontec Chameleon works just fine. It has a true IEEE1284 transceiver on the PC side (guess that guarantees good signal integrity over a long cable length) and a Xilinx CoolRunner CPLD (3.3/5V tolerant IO), and I've never had any problems with signal integrity at up to 16 MHz JTAG clock (that's for the new config, Wiggler wont go beyond 500kHz). The parallelport is just not designed to do bitbanging - you can transfer 500-1000 kByte/s using EPP accesses, at a latency of 1-2us. > What I do think that could be done is an open-source JTAG pod. Start > out with something like a Revely RMS101 > (http://www.revely.com/RMS101/AboutRMS101.htm) board, or other low cost > ARM board which has an ethernet. Develop the electronics necessary to > provide good signal conditioning to the Device Under Test's JTAG port. > Then using that board, build up an open-source jtag solution. While > this would cost more than $10 for the electronics, I feel that it would > be far superior to a wiggler, but still at a fraction of the cost of a > commercial JTAG unit? Software of this caliber would then not be > limited to just one board electronics, others may decide (maybe > SparkFun?) to further streamline the electronics and offer it at an even > lower cost? The software part is mostly independent from the underlying JTAG interface - all the tricky logic can be implemented equally well for a wiggler and a much smarter (and more expensive) device. This would give users the freedom to choose between hobbyist quality at a few $, or some more money for a thoroughly designed interface offering high TCK and a failure-proof electrical interface - both offering the same functionality. Personally, I'd favor a FPGA based solution, using USB 2.0. Such a setup would allow very high speed at low cost while still offering more flexibility than a uC based solution with an Ethernet interface. Regards, Dominic Rath
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Re: [lpc2000] Re: Which pins of P1 can be used simultaneously with JTAG?
2005-12-18 by Dominic Rath
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