Cgs synth

On 21.02.2007, at 02:25, John Loffink wrote:

> DIVIDE Pot --> 100K Division pot on schematic
> CLOCK In jack --> M+In pad
> CV IN jack --> to 1K pullup and 100K Division pot, as in schematic
> PULSE OUT jack --> LO Pad
> TRIG OUT jack --> HO Pad
> UP jack --> UP pad
> DOWN jack --> DN pad
>

Thanks, that seems to work, however, when i have the following setup:

- Q119-sequencer gate out -> multiple
- multiple to ADSR1 then VCA
- multiple to CLOCK IN,
- PULSE OUT to ADSR2 then VCA

both VCA's are feeded with the same signal (sinewave) and mixed into
a audio mixer.

if i assume right, with the pot total left (e.g. against ground)
there should be no
"delay" difference between both pulses on the VCA, but there is a
noticeable
(e.g. 1 to 5 times slower) delay when pot is total left.

CV is not fed, normalized against according diagram.

Any more hints what could still be wrong ?

--jan