That is not what i meant Dave and you perfectly well know that...
Really, i thought about a pattern that allows more objective evaluation of
the
result.
if you have these wedges you can tell at which width they merge.
I tried to make such a pattern today, but didn't manage to find the right
software.
it must be vector graphic i guess.
thank you very much for you very helpful answer Dave, but i am still
looking
for other options...
ST4
Really, i thought about a pattern that allows more objective evaluation of
the
result.
if you have these wedges you can tell at which width they merge.
I tried to make such a pattern today, but didn't manage to find the right
software.
it must be vector graphic i guess.
thank you very much for you very helpful answer Dave, but i am still
looking
for other options...
ST4
>
> Test pattern ?
>
> I have a simple 28 pin DIP and 28 pin SOIC with about 28 thru-holes
> that would be a good test.
>
> Make sure the holes are plated thru and could you electro-plate the
> SOIC pad in gold ?
>
> Send it to me and I'll review your test. : )
>
> Dave
>