AW: [Doepfer_a100] RE: Newbie question about A-190-1 and A-145
2013-11-14 by yahoo@doepfer.de
> Try this route: > Oscillator's wave to Comparator Pos. input. (Neg. to GND). > Comparator's output to logic AND with Gate. The AND's output to > ADSR and back to Comparator's Pos. at the same time. I can > confirm it but in theory it should help to delay the Gate signal > to the nearest zero-crossing of the wave. I'm not sure if this will work. The comparator will generate a rectangle wave. If the gate signal is AND-wired with this you obtain a gated rectangle wave that permanently triggers the ADSR. And you can't feed the AND's output to the positive input of the comparator as it is already connected to the oscillator. I think one needs kind of a flipflop that is set by the gated rectangle (as described by you) and resetted by the falling edge of the gate. P.S. We are working on an additional logic module (A-166-2) that will include - among other functions - also a flipflop. Sometimes I'd like to have a flipflop function in certain patches. A simple zero-crossing comparator could be added to this module too. The A-166-2 will probably also include a rising edge detector (outputs a short pulse at the rising edge of a digital input signal) and a falling edge detector (outputs a short pulse at the falling edge of a digital input signal). I think also about a pitch-change-detector (or more general CV-change-detector). It outputs a signal whenever a CV connected to it's input changes (probably with three outputs: positive/negative/both). So far there is no front panel layout available as I'm still fiddling about the arrangement of the sockets and controls, which features will be finally included and which front panel width (4/6/8 HP) is the best compromise. Best wishes Dieter Doepfer