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Re: [AVR-Chat] question about serial port bit banging

Re: [AVR-Chat] question about serial port bit banging

2005-12-27 by Jim Wagner

Jim -

There is an Atmel apnote on bit-banged serial. It should be
on the Atmel website AND on the AVRFreaks.net site. It
should save you a lot of hassle! If you look at the
waveforms for a standard serial UART, you will see what the
idle levels are at the I/O pin.

Cheers
Jim

On Tue, 27 Dec 2005 11:10:06 -0800
 James Washer <washer@trlp.com> wrote:
> I need to implement a bit-bang serial port. It's my
> understanding the RS232 "idles" high, which would mean
> the logic level out of a max232 would be low. The start
> bit would then be logic high to the AVR.. Is this
> correct?
> 
> thanks
> 
>  - jim
> 
> 
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question about serial port bit banging

2005-12-27 by James Washer

I need to implement a bit-bang serial port. It's my understanding the RS232 "idles" high, which would mean the logic level out of a max232 would be low. The start bit would then be logic high to the AVR.. Is this correct?

thanks

 - jim

Re: [AVR-Chat] question about serial port bit banging

2005-12-27 by Dennis Clark

This is correct.

DLC

James Washer wrote:
> I need to implement a bit-bang serial port. It's my understanding the RS232 "idles" high, which would mean the logic level out of a max232 would be low. The start bit would then be logic high to the AVR.. Is this correct?
> 
> thanks
> 
>  - jim
> 
> 
> 
>  
> Yahoo! Groups Links
> 
> 
> 
>  
> 
> 


-- 
---------------------------------------
Dennis Clark    TTT Enterprises
---------------------------------------

Re: question about serial port bit banging

2005-12-27 by Ingvar Esk

--- In AVR-Chat@yahoogroups.com, James Washer <washer@t...> wrote:
>
> I need to implement a bit-bang serial port. It's my understanding 
the RS232 "idles" high, which would mean the logic level out of a 
max232 would be low. The start bit would then be logic high to the 
AVR.. Is this correct?

No, if I understand you correct. The word "high" is missleading.

Serial comm idles at a logical "true" or "1" level. On the RS232 side 
this is represented with a -15 to -3V signal. On the TTL side of the 
MAX chip it is represented by a 5V signal. The reverse, a logical 
false or "0", is represented by a +3-+15V signal and a 0V signal 
respectivily.

Ingvar

Re: question about serial port bit banging

2005-12-27 by Don Kinzer

--- In AVR-Chat@yahoogroups.com, James Washer <washer@t...> wrote:
> Is this correct?

Yes.

As you may know, the trick to bit banging a serial input is to arrange 
to sample the input line consistently somewhere near the middle of the 
bit window.  Generally, this means that you need to sample the input 
line at some multiple of the bit frequency (probably 4x is the lowest 
practical multiple, 8x or higher is even better if you can afford the 
overhead) and then arrange to sample the input line at multiples of 
the bit time after a start bit has been detected.  This process is 
complicated by the fact that the transmitter's clock can have 
virtually any phase relationship to the receiver's clock so you have 
to design your software to accommodate the worst-case clock skew.  
Moreover, the transmitter's clock and the receiver's clock can vary 
from the ideal frequency in opposite directions and the resultant 
error is cumulative over the 9 to 11 bits of the character being 
received.

Compared to reception, bit bang transmission is a cinch.

I implemented a 4-channel bit bang full duplex UART in assembly 
language for the ZX microcontrollers; they are based on a mega32 
running at 14.7456MHz.

Don
ZBasic Microcontrollers
http://www.zbasic.net

Re: [AVR-Chat] Re: question about serial port bit banging

2005-12-28 by James Washer

Yes, this is what I found to be true in (my limited) testing.. This is the opposite of what I believed to be true ( and attempted to write ) when I posted my question early. 

On Tue, 27 Dec 2005 22:21:50 -0000
"Ingvar Esk" <ingvar.esk@swipnet.se> wrote:
Show quoted textHide quoted text
> --- In AVR-Chat@yahoogroups.com, James Washer <washer@t...> wrote:
> >
> > I need to implement a bit-bang serial port. It's my understanding 
> the RS232 "idles" high, which would mean the logic level out of a 
> max232 would be low. The start bit would then be logic high to the 
> AVR.. Is this correct?
> 
> No, if I understand you correct. The word "high" is missleading.
> 
> Serial comm idles at a logical "true" or "1" level. On the RS232 side 
> this is represented with a -15 to -3V signal. On the TTL side of the 
> MAX chip it is represented by a 5V signal. The reverse, a logical 
> false or "0", is represented by a +3-+15V signal and a 0V signal 
> respectivily.
> 
> Ingvar
> 
> 
> 
> 
> 
> 
>  
> Yahoo! Groups Links
> 
> 
> 
>  
>

Re: [AVR-Chat] Re: question about serial port bit banging

2005-12-28 by dlc

Indeed,

   I generally sample the bit stream at the fastest rate I can, between 
16 and 60X the clock rate, then arrange subsequent checks to be centered 
in the rest of the bits.  I've gotten a 4MHz 12C508A to run reliably on 
its internal RC oscillator at 9600 bps and a Tiny12 at 1MHz at 9600 bps. 
  The 12C508 was totally on a timed FSM, the Tiny12 had the advantage of 
having an IRQ that I could use on a timer.  All in assembly of course, 
you probably couldn't get a receiver to work well using a high level 
language.

fun stuff,
DLC

Don Kinzer wrote:
> --- In AVR-Chat@yahoogroups.com, James Washer <washer@t...> wrote:
> 
>>Is this correct?
> 
> 
> Yes.
> 
> As you may know, the trick to bit banging a serial input is to arrange 
> to sample the input line consistently somewhere near the middle of the 
> bit window.  Generally, this means that you need to sample the input 
> line at some multiple of the bit frequency (probably 4x is the lowest 
> practical multiple, 8x or higher is even better if you can afford the 
> overhead) and then arrange to sample the input line at multiples of 
> the bit time after a start bit has been detected.  This process is 
> complicated by the fact that the transmitter's clock can have 
> virtually any phase relationship to the receiver's clock so you have 
> to design your software to accommodate the worst-case clock skew.  
> Moreover, the transmitter's clock and the receiver's clock can vary 
> from the ideal frequency in opposite directions and the resultant 
> error is cumulative over the 9 to 11 bits of the character being 
> received.
> 
> Compared to reception, bit bang transmission is a cinch.
> 
> I implemented a 4-channel bit bang full duplex UART in assembly 
> language for the ZX microcontrollers; they are based on a mega32 
> running at 14.7456MHz.
> 
> Don
> ZBasic Microcontrollers
> http://www.zbasic.net
> 
> 
> 
> 
> 
> 
> 
>  
> Yahoo! Groups Links
> 
> 
> 
>  
> 
> 

-- 
-------------------------------------------------
Dennis Clark          TTT Enterprises
www.techtoystoday.com
-------------------------------------------------

Re: [AVR-Chat] Re: question about serial port bit banging

2005-12-28 by Zack Widup

Microchip has an application note on serial comm that even gives routines 
for the timing and formulas to calculate the values used in the timers.  I 
forget which one it is but I have it around somewhere.  I've used it 
successfully with PIC16C54, 16F84 and 16F876.

The only problem is that the timing uses simple one-loop counters.  For 
higher frequency crystals you would need to go to nested loop counters or 
much faster baud rates.  9600 baud is difficult to implement with an AVR 
running at 16 MHz.  Not impossible but more complicated.

Zack
Show quoted textHide quoted text
On Wed, 28 Dec 2005, dlc wrote:

> Indeed,
> 
>    I generally sample the bit stream at the fastest rate I can, between
> 16 and 60X the clock rate, then arrange subsequent checks to be centered
> in the rest of the bits.  I've gotten a 4MHz 12C508A to run reliably on
> its internal RC oscillator at 9600 bps and a Tiny12 at 1MHz at 9600 bps.
>   The 12C508 was totally on a timed FSM, the Tiny12 had the advantage of
> having an IRQ that I could use on a timer.  All in assembly of course,
> you probably couldn't get a receiver to work well using a high level
> language.
> 
> fun stuff,
> DLC
>

Re: question about serial port bit banging

2005-12-28 by Gary Dion

Hi Jim.  

Should you be using the AVR GCC compiler, you are welcome to some 
code I wrote to implement a full-duplex software UART.  The function 
is set up to be called at 4x the baud rate you want.  I run it at 
4800 baud (ie. it's called at 19.2kHz) for a GPS receiver, but 9600 
works just fine too (when called at 38.4kHz).  This is on an ATmega8 
running at 14.7456mHz and I haven't had any problems.

But to answer your question: 
In TTL (I/O pin), idle is high, and the start bit is low.
In RS-232, idle is low, and the start bit is high.
You can find this and more on page 134 of the ATmega8 manual.

-Gary

--- In AVR-Chat@yahoogroups.com, James Washer <washer@t...> wrote:
>
> I need to implement a bit-bang serial port. It's my understanding 
the RS232 "idles" high, which would mean the logic level out of a 
max232 would be low. The start bit would then be logic high to the 
AVR.. Is this correct?
Show quoted textHide quoted text
> 
> thanks
> 
>  - jim
>

Re: question about serial port bit banging

2005-12-28 by Don Kinzer

--- In AVR-Chat@yahoogroups.com, Zack Widup <w9sz@p...> wrote:
> 9600 baud is difficult to implement with an AVR running at 16 MHz.

My 4-channel implementation can run at 19200 baud reliably but only if 
just one channel is open.  For 2 to 4 channels, the maximum baud is 
limited to 9600.  Of course, at the higher rates there's not much time 
left to do very much other processing so a lower maximum rate is 
better.

Don
ZBasic Microcontrollers
http://www.zbasic.net

Re: question about serial port bit banging

2005-12-28 by poitsplace

Did you use the timer interrupt for that?  Seems like it would have 
less overhead than a delay loop (for reasons besides the fact that you 
had the MCU do nothing)

--- In AVR-Chat@yahoogroups.com, "Don Kinzer" <dkinzer@e...> wrote:
>
> --- In AVR-Chat@yahoogroups.com, Zack Widup <w9sz@p...> wrote:
> > 9600 baud is difficult to implement with an AVR running at 16 MHz.
> 
> My 4-channel implementation can run at 19200 baud reliably but only 
if 
> just one channel is open.  For 2 to 4 channels, the maximum baud is 
> limited to 9600.  Of course, at the higher rates there's not much 
time 
Show quoted textHide quoted text
> left to do very much other processing so a lower maximum rate is 
> better.
> 
> Don
> ZBasic Microcontrollers
> http://www.zbasic.net
>

Re: [AVR-Chat] Re: question about serial port bit banging

2005-12-28 by James Washer

I've got my avr-gcc mega8 full-duplex SW uart working.. just need to optimize it a bit now.. Thanks's for the kind offer of your code. Once I get mine where I want it, I'll take a look at yours. I'm fairly new to microcontrollers, so I like to take a stab at everything myself, before I borrow code.
thanks again
 - jim

On Wed, 28 Dec 2005 16:44:41 -0000
"Gary Dion" <gdion@engineer.com> wrote:
Show quoted textHide quoted text
> 
> Hi Jim.  
> 
> Should you be using the AVR GCC compiler, you are welcome to some 
> code I wrote to implement a full-duplex software UART.  The function 
> is set up to be called at 4x the baud rate you want.  I run it at 
> 4800 baud (ie. it's called at 19.2kHz) for a GPS receiver, but 9600 
> works just fine too (when called at 38.4kHz).  This is on an ATmega8 
> running at 14.7456mHz and I haven't had any problems.
> 
> But to answer your question: 
> In TTL (I/O pin), idle is high, and the start bit is low.
> In RS-232, idle is low, and the start bit is high.
> You can find this and more on page 134 of the ATmega8 manual.
> 
> -Gary
> 
> --- In AVR-Chat@yahoogroups.com, James Washer <washer@t...> wrote:
> >
> > I need to implement a bit-bang serial port. It's my understanding 
> the RS232 "idles" high, which would mean the logic level out of a 
> max232 would be low. The start bit would then be logic high to the 
> AVR.. Is this correct?
> > 
> > thanks
> > 
> >  - jim
> >
> 
> 
> 
> 
> 
> 
> 
>  
> Yahoo! Groups Links
> 
> 
> 
>  
>

Re: question about serial port bit banging

2005-12-28 by Don Kinzer

--- In AVR-Chat@yahoogroups.com, "poitsplace" <lmburt@e...> wrote:
> Did you use the timer interrupt for that?  Seems like it would
> have less overhead than a delay loop.

Yes.  In this particular system the serial transmission and reception 
occurs "in the background" while other work is being done.  Each 
serial channel has its own transmit and receive queues serving as the 
source and sink for the data.

Don
ZBasic Microcontrollers
http://www.zbasic.net

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