ATmega128 ADC with One-Wire protocol
2005-12-04 by Rick Collins
I have an ATmega128 in an existing circuit that reads the value of a resistor in an attached cable to determine the identity of an attached device. This has worked well, but they are out of resistor values that they can easily distinguish. I am considering the Dallas OneWire devices as a possible work around. There are nearly 100,000 of these units in the field and the new product replacing the old one has the same circuit. This circuit is the problem. The ADC input can be configured as a digital IO, but there are two RC filters between the ADC and the cable attachment. In between the two RC filters is an open drain transistor pull down and a 5.6K pull up. The RC between the pull down and the cable is RC=1 uS. The RC between the pull down and the ADC input is 22 uS. I can live with the short RC by making my minimum pull down time 3 uS. But the long RC will prevent me from using the digital input to see the response from the slave on a read. The minimum hold down time for the slave is only 15 uS. At that time the voltage at the ADC will be about half the pull up voltage. So to make this work I will need to use the ADC. The spec timing is a 200 KHz clock (faster with poorer resolution). It seems to take 1 clock to synchronize and 1.5 clocks to do the S/H, another 12 clocks for a result. At 200 KHz, 2.5 clocks is almost the perfect sampling point of 15 uS, but I have no idea of the size of the aperature window. Anyone have experience with precise timing of the ADC like this? I need to distinguish between 50% of Vcc and 95% of Vcc, so the resolution requirements are not high. Even 6 bits should give me plenty of head room. But the timing is critical. At 15 uS the waveform will start ramping back up so I need to sample as close to that time as possible. Is this practial or even feasible? My local disti FAE is not very familiar with the AVR so I can't ask for help from him. Will Dallas support be of any use on this or do I need to test it myself?