AVR-Chat

Hi;

bcz of my oldness, I didn't understand exactly your
problem, but using one SRAM with more than one
cpu/micro depends on application. but as usual, you
shoud use but tranceivers and isolate address/data bus
of each cpu from the other.

as a suggestion, if timing of two 128's arent very
important, during memory transactions made by other
cpu, you can halt the other one. or simply share a
signal between two micro's to synchronize memory
access, but in all cases you need to use bus
trenceivers such as 74245.

if you want to deal with more than one chip to share
between more cpu's you can also use a FPGA and
synchronize access to SRAM modules using an unused
interrupt (highest priority, to stop cpu functioning).

good luck.



		
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At 09:35 PM 3/27/2005, Reza wrote:

>Hi;
>
>bcz of my oldness, I didn't understand exactly your
>problem, but using one SRAM with more than one
>cpu/micro depends on application. but as usual, you
>shoud use but tranceivers and isolate address/data bus
>of each cpu from the other.

Not really necessary with a microcontroller, if you design carefully.

The chips power up with the ports as inputs.
If you implement a couple of handshaking lines and a few logic gates, you 
can connect both chips to the SRAM directly.
You don't HAVE to use the SRAM interface after all, you can do the lines as 
I/O pins.

Dave VanHorn schrieb:
> At 09:35 PM 3/27/2005, Reza wrote:
> 
>>cpu/micro depends on application. but as usual, you
>>shoud use but tranceivers and isolate address/data bus
>>of each cpu from the other.
> 
> Not really necessary with a microcontroller, if you design carefully.

This is what I am thinking about: What needs to be considered so I can 
drop the transceivers. Board space is tight and each chip I can remove 
is worth a lot (of time to think about other solutions).

> The chips power up with the ports as inputs.
> If you implement a couple of handshaking lines and a few logic gates, you 
> can connect both chips to the SRAM directly.

Exactly what the initial idea was. Now, what would "directly" really 
mean? Is it really a good idea to directly connect the busses to each 
other? This leaves the possibility that two devices are driving the same 
lines when software fails.

If I can't do this - will series resistors be enough and what would the 
penalty be?

> You don't HAVE to use the SRAM interface after all, you can do the lines as 
> I/O pins.

That is in fact correct, but using the SRAM interface gives some very 
nice properties:
- Lowest number of cycles from data ready to data written to the shared 
memory.
- Small number of additional pins needed: There might the the need for 
an additional SRAM attached to one of the AVRs that is not shared but 
connected to the same bus. Both chips (the shared one and the other one) 
would be switched through a port pin.

Regards,
Philipp