On Mon, Mar 28, 2005 at 08:47:18PM -0300, Mark Jordan wrote: > > On 28 Mar 2005 at 20:14, Richard Reeves wrote: > > > Yes, the interrupt flags are set while you're in an ISR, and executed > > in the order that they appear in the interrupt vector table once the > > MCU is able to. > > > Even if they occur out of that order? Another way to look at it is that there isn't anything to queue the order pending IRQ's arrived. So once the CPU is freed to service IRQs its hardwired logic simply dispatches the highest priority pending IRQ. -- David Kelly N4HHE, dkelly@HiWAAY.net ======================================================================== Whom computers would destroy, they must first drive mad.
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Re: [AVR-Chat] Digest Number 985
2005-03-29 by David Kelly
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