AVR-Chat

At 02:26 PM 3/27/05 +0200, Philipp Adelt wrote:
>David Kelly schrieb:
> > How fast must each CPU access the shared RAM? Not video speeds, I
> > presume?

<snip>

>Two AVRs on the board share the load associated with the nodes' tasks.
>One AVR will be responsible for keeping up communication over the
>bus(es). This will be quiet a challenge for a 16MIPS 8bit device but in
>the current state it seems feasible.
>
>The other AVR will do "real system" interaction. A/D, digital I/O with
>synchronous timing and a bunch of calculations upon this data. As this
>will have some tight timing constraints that require interrupt use for
>almost all of the inputs, it will be hard to join both AVRs.

It sounds more like an application for a FIFO or a dual port RAM.  FIFO 
would be better for a buffer type scheme and dual-port for a mailbox type 
scheme.  Both types would take care of most of your timing issues without 
much need for additional handshaking.

Robert

" 'Freedom' has no meaning of itself.  There are always restrictions,   be 
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