[sdiy] Digital Waveshape Generator.

[Donald Tillman]

On Jul 12, 2025, at 11:30 AM, Phillip Harbison <alvitar at xavax.com> wrote:
> 
> I could use my divider scheme and 14.4 MHz clock to generate the 12 notes of the top octave and use PLLs to multiply each by 256, but 12 PLLs and 12 sets of counters is a lot of chips.

Well hey, if y'r gonna use a PLL, consider placing the programmable divider *inside* the PLL feedback loop, so it becomes a programmable frequency multiplier.

That way you avoid the divide down speed and accuracy constraints working against each other (fewer bits of divide down accuracy for the higher frequency notes).

  -- Don
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Donald Tillman, Palo Alto, California
https://till.com