[sdiy] Bit Crunch

Eric Brombaugh ebrombaugh at earthlink.net
Wed May 10 06:48:59 CEST 2006


On May 9, 2006, at 9:35 PM, Kyle Stephens wrote:

> Heylo...
>
> I'm trying to cook up some bit crunch distrortion by
> way of intentionally sampling an anlog input at a low
> fequency.
>
> Is this as simple (eh, understatement...) as wiring an
> ACD chip to a DAC chip, with the sample rate for the
> ADC turned down low?
> I'd ideally like a variable sample rate if possible.
>

Even simpler still - forget the ADC/DAC and just use a sample/hold 
clocked at a few kHz. You'll get all the aliases you could dream of, 
without having to fiddle with all the digits. There was a good article 
illustrating this in Circuit Cellar a few months back.

Using an ADC/DAC you can also add amplitude quantization which 
generates a different kind of distortion - basically just raises the 
noise floor (noise is down 6dB for every additional bit you use).

Eric




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