[sdiy] Cyclone SID

[Rainer Buchty]

>I was thinking about putting kind of a SID clone into an Altera Cyclone
>FPGA (EP1C3).

And what about the filters? :)

>Is the QuartusII IDE any good?

Although I work almost exclusively with Xilinx parts and their tools, to 
my knowledge the IDE of Altera is somewhat better in terms of usability.

>Are there any good resources on learning VHDL on the web?

Check out Peter J. Ashenden's "VHDL Cookbook" which is available for 
free on the net.

>It seems to me it is possible to put about 24 SID voices into that
>chip...

Actually, you should be able to do way more if you go for a fully 
time-sliced design, i.e.

- one phase accumulator, and
- one envelope generator
- a counter & address generator

and some RAM. Not sure about the Cyclones, but it would make me wonder 
if they don't have some sort of embedded RAM like Xilinx's BlockRAM for 
instance. (If anything fails, you can always "abuse" the lookup-tables 
which Xilinx e.g. calls SelectRAM.)

Regarding the filter, you might want to look at the reSID sources to 
decide if you want to do that either in the digital domain, or in plain 
old hardware (ASCII schematics given in the reSID sources).

And if you don't want to start from scratch, there are various C64 FPGA 
implementations on the net. Search for Syntiac's pages who did a more or 
less complete and working C64 implementation based on Xilinx Spartan; 
you also might want to check out the C-1 project (c64upgra.de/c-one/) 
which is using Altera FPGAs and a dedicated development board (the 
C-One) which you can buy from Individual Computers.

HTH,
	Rainer