[sdiy] Single chip digital delay

[Antti Huovilainen]

On Thu, 26 Jan 2006, Seb Francis wrote:

> BBD.  In which case, it will not be good enough for me.  For my purposes I 
> definitely need a clean (get out what you put in) delay of 5 to 50ms.  CD 
> (44.1kHz/16bit) is the kind of quality level I'm aiming for.

Seems to me that you need a ADC/DAC or a CODEC + interface + a bit of 
sram.

> But I still do want a simple (minimum component count) solution...

Is three ICs good enough?

> My current thinking is to use a high end PIC with some kind of ADC and DAC on 
> the front and back of it.  Yes I know a DSP chip would be better, but I have 
> a PIC programmer and I know how to program PICs.  As for the ADC and DAC, I

What I'd do is find a suitable oversampling codec (there are many that are 
cheap and decent quality) and use dsPIC to interface between that (dsPIC 
has codec interface that can handle the serial datastream) and a cheap 
32kbyte SRAM.

The caveat: pretty much all modern (read obtainable) codecs, adcs and dacs 
are SMD.

Antti

"No boom today. Boom tomorrow. There's always a boom tomorrow"
   -- Lt. Cmdr. Ivanova