[sdiy] Wanna help me make up a VCF homework? ;)

[Antti Huovilainen]

On Thu, 23 Feb 2006, Aaron Lanterman wrote:

> I'm making up a problem now where I'm going to have them look at an OTA-based 
> 1-pole filter cell (in the usual four pole setup) and tell me what the cutoff 
> is as a function of the current to the pin on the VCA, along with analyze the 
> divide-down ladder, etc.

I assume you mean small signal analysis?
Looking at Polyfusion VCF, SSM2040 schematics and Ray's VCFs, I can't see 
any real difference for small signals besides buffer type and biasing.

The eq for cutoff is similarly same for all of them. Find Rfeedback, 
Rdivider, Ictrl, and capacitor value and plug them in to the equation.
LM13700 datasheet even provides the equation and example.

Do I fail? :)

Basically, can you elaborate what you mean by the homework?

> I've gotten three following so far:
> [...]
> Any others come to mind?

Later MS-20 also has OTA 1-pole cores (see Rene's site for example).

> In particular, all the designs I've found drop a cap straight to ground and 
> then put in a buffer. I've yet to find one that actually follows the one of 
> the ARP patents, where coming out of the OTA the current goes into an 
> integrator formed with a cap in the feedback loop - I showed that in class so 
> it would be nice to find an actual example.

Does it make any real difference? I remember seeing a page where VCAs were 
compared and there wasn't any difference between cap-to-ground and 
cap-in-integrator.

> I don't want to do the CEM3320 one, since it's not drawn in a 
> student-friendly clear way.

CEM3320 is not an OTA based design afaik.

Antti

"No boom today. Boom tomorrow. There's always a boom tomorrow"
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