[sdiy] sample & hold

[Ian Fritz]

Scott et al. --

I have just completed a new S/H design.  It uses an LM2901 comparitor and a 
pair of transistors to produce gate and trigger signals whenever the signal 
defining the timing crosses a user defined threshold.   The trigger pulse 
then activates the S/H proper, which comprises an LM13700 current switch 
and a CA3140 high-impedance buffer.

I'm currently wiring up a quad bank of these.  The design is efficient for 
a quad unit since the 2901 is a quad, the LM13700 is a dual and monolithic 
arrays can be used for the transistors.

   Ian


At 08:21 AM 2/2/06, Scott Stites wrote:

> >looks nice--please post more info on your implementation and results, 
> i'd be very interested.  but $10.40 a pop (digikey)?... ouch.
>
>The LF398 is considerably less expensive.  I don't know how it stacks up 
>performance-wise to the AD device, but it certainly seems to do the job.
>
>Rene Schmitz's YASH is a great little S&H which uses the LF398.  It has an 
>internal clock with a normalled input for external clock signals.  In 
>fact, if one put a switch across the 470 pF cap, one could switch it to 
>Track and Hold operation.
>
>http://www.uni-bonn.de/~uzs159/