[sdiy] PCB layout rules

[Seb Francis]

Joe Grisso wrote:
> I have
> yet to see a SDIY design operating at 25MHz with a bunch of 16-bit+
> digital peripherals hanging off of a CPU.

This is one with 2 dsPICs running at 120MHz with an SRAM each...
http://burnit.co.uk/sdiy/index.php?page=4xd&subpage=layout

As you can see from the bottom image I kept the digital and analog board 
sections completely separate with the ground planes being connected only 
back at the PSU (top middle).  The hybrid components (the CODEC ICs) 
straddle the moat between the digital and analog ground.  Fortunately 
for this project it was possible to do the layout in this ideal way and 
the digital noise in the analog section is unmeasurable with my 
equipment (in contrast to when I had it built on solderless breadboard 
where I had a worse signal-to-noise ratio than if I'd used BBDs!)

Seb