[sdiy] PCB layout rules

[Antti Huovilainen]

On Sat, 23 Dec 2006, John Luciani wrote:

> The edge speed is what determines the system frequency. I should have
> been more specific. Use the lowest edge speed you can tolerate.

Or more likely, the lowest edge speed you can actually buy. Even the 
slowest Xilinx CPLDs are five to ten times too fast for my use (and most 
other diyers I guess).

Antti

"No boom today. Boom tomorrow. There's always a boom tomorrow"
  -- Lt. Cmdr. Ivanova