[sdiy] complex logic problem

[Dave Manley]

It depends on the number of input/output variables in your truth table. 
  If you have more than about 8 inputs it gets very difficult to do a 
good job with Karnaugh maps.

What you are looking for is a logic synthesis tool.  There is a very old 
  tool called espresso, that will do what you want if you can find a 
copy that will run on your platform.  It is an old Berkely Unix tool.

The classic old algorithm to do logic minimization is named Quine-McCluskey.

Take a look here:

http://en.wikipedia.org/wiki/Quine-McCluskey_algorithm

Some of the external links look promising and more up to date (although 
espresso is mentioned).

-Dave

Tavys Ashcroft wrote:
> Hi all,
> 
> I'm working on a sequencer design that is probably going to require at
> least a small microcontroller or FPGA to take care of some logic.  But
> before I go that route, I want to lay out a big old truth table and
> see if I can reduce my logic needs down to a realistic number of
> gates.  Perhaps I can get away with using a handfull of CMOS chips.
> 
> Is there any software out there that would automate this process, or
> at least assist?  I'm hoping to just fill out a giant truth table and
> have software give me possible combinations of gates that would create
> the result I'm looking for.  Does such a thing exist?  If not, could
> somebody point me to a good primer for doing this by hand?  I've only
> ever made digital logic circuits with a few gates before and this one
> is getting bigger than I can visualize.
> 
> Thanks,
> Tavys
> 
> 
>