[sdiy] complex logic problem

[Tavys Ashcroft]

The first result for "Karnaugh map" was a Karnaugh map reducer
program.  Great!  Thanks a lot, this will really help me.

-Tavys

On 8/23/06, Scott Gravenhorst <music.maker at gte.net> wrote:
> I think what you want is to generate a Karnaugh map, it's meant to minimize boolean
> expressions, from that you can generate simplified logic.  Google "Karnaugh map"
> and get many many hits.  I'll bet there's software, but I've never used such.  I've
> done Karnaugh maps by hand, they work, they're logical, but it was years ago and I
> have CRS (Can't Remember Shit)...
>
>
> "Tavys Ashcroft" <tavys.ashcroft at gmail.com> wrote:
> >Hi all,
> >
> >I'm working on a sequencer design that is probably going to require at
> >least a small microcontroller or FPGA to take care of some logic.  But
> >before I go that route, I want to lay out a big old truth table and
> >see if I can reduce my logic needs down to a realistic number of
> >gates.  Perhaps I can get away with using a handfull of CMOS chips.
> >
> >Is there any software out there that would automate this process, or
> >at least assist?  I'm hoping to just fill out a giant truth table and
> >have software give me possible combinations of gates that would create
> >the result I'm looking for.  Does such a thing exist?  If not, could
> >somebody point me to a good primer for doing this by hand?  I've only
> >ever made digital logic circuits with a few gates before and this one
> >is getting bigger than I can visualize.
> >
> >Thanks,
> >Tavys
> >
>
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