[sdiy] Re: Cauer Filter Design
Ian Fritz
ijfritz at earthlink.net
Tue Jan 6 18:28:32 CET 2004
Hi Mangus!
:-)
At 01:35 AM 1/6/2004, Magnus Danielson wrote:
>As a side-note, as I looked through the SSM 2040 datasheet earlier I saw a
>4-pole Cauer setup. It's in Figure 8 on page 3 of the 4-page datasheet that I
>have. You could naturally make a 10th order variant if you really wish.
Did you ever check the math on that datasheet? At one point, I convinced
myself that some of it is incorrect.
The source of the error seemed to be the same one that Bernie Hutchins and
I discovered just a couple of years ago in an old Electronotes circuit.
That circuit was a voltage-controlled Butterworth design from S. Franco. I
built it (was I really the first one ever??) and found a pronounced
peaking. I asked Bernie if there was an error on the schematic, and he
figured out that the error apparently came from assuming that one of the
OTAs behaved like a current-controlled resistor (CCR). This behavior only
holds when the OTA output is at zero potential, e.g., when driving an op
amp summing node. Otherwise you have to be careful to solve the correct
node equations using the OTA transconductance expression.
Ian
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