[sdiy] simple TTL programmable counter question (74LS163)
Magnus Danielson
cfmd at swipnet.se
Mon Oct 27 00:39:08 CET 2003
From: sasami at hotkey.net.au (Ken Stone)
Subject: Re: [sdiy] simple TTL programmable counter question (74LS163)
Date: Mon, 27 Oct 2003 09:19:31 +1100
Hi Ken,
> You can see what I was doing in a similar project here. Admittedly I haven't
> tested this PCB, but my prototype certainly ran fine. I think I also did one
> using the 161, but I forget!
>
> http://www.cgs.synth.net/modules/cgs20_dco.html
No, you where using 193 and not either of 161 or 163s.
> >The idea is: I take a high frequency oscillator (100 MHz in the final
> >poject, 16 MHz in my bench project so i can see the signals on my
> >Oscope).
>
> Not with LS TTL! they flake at about 25 MHz.
I agree, for those speeds I would use a small CPLD or FPGA today. Cheap and
fairly easy to get the intended performance.
A hint would be to get a VHDL simulator, get the VHDL models from Free Model
Foundation and it should be easy enough to build a model up the thing you are
trying to do and get a full-blown view of all the signals going in the ratnest.
Quite easy to get started these days and if you spend some time over the
traces I am sure you will learn a few things in the process. The FMF models
can also be timing correct, which is kind of neat. However, it doesn't have the
74LS163, but it has the F and HC variants, more can be added since that is
stored separately from the actual model. Do look yourself in the FMF webpages:
http://www.eda.org/fmf/wwwpages/Welcome.html
Well, some of us do spend time over analog simulations, so why not do the same
for digital designs?
Cheers,
Magnus
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