[sdiy] Maxim analog switch ICs

[René Schmitz]

Hi Grant,

Grant Richter wrote:
> Using the 4000 series CMOS in the current mode into a summing node has a
> couple of drawbacks.
> 
> Off isolation is compromised as leakage currents are larger than the
> resistive (voltage mode) isolation. A 15 volt signal is only attenuated to
> about 1 volt.

Maybe, but theres the option of adding a second switch to short the 
unselected input to GND.

> The switching of the summing node can cause signals to be sent back up the
> inputs as voltage at the summing node moves up and down from leakage
> currents or something.

The fact that it has been done similarly in mixing desks shows that 
these drawbacks can be overcome.

> You may need to bias the ground pin to -0.7 volts to correctly handle a -15
> volt input.

I took care of that by using the chip with +-5V supplies. Infact a 
74HC405x could also be used.

> Not all 4000s are the same. The ST HCF4066 series will allow this, but not
> the Fairchild CD4066 (blows up).

This is a stretch of the specs anyway.

Cheers,
  René

-- 
uzs159 at uni-bonn.de
http://www.uni-bonn.de/~uzs159