[sdiy] simple TTL programmable counter question (74LS163)

[Ken Stone]

>> ALSO did one with 161 or 163. The count direction is reversed (i.e. an up
>> count, so it was pain, and I went back to the 193.
>
>The trouble with using '193 counters is that the counter re-load is
>asynchronous, which means that instead of getting a precise "divide
>by N" you get a "divide by [ N + Y ], where Y is the total propagation
>time for the carry to cascade through all the counter chips and
>through the one-shot (if present). If your load pulse is timed such
>that it lands within the actual setup/hold window of the input
>clock, you could find that Y will vary between cycles. You're
>certainly going to get some jitter caused by variations of when the
>load pulse takes effect, within a cycle. Scary! You sure you want this?

Actually in real life, a little jitter is not a problem, considering all the
effort we usually go to add it later - delay lines etc. However, I never
noticed any such jitter in my prototypes. Also my monostable reload pulse is
shorter than a single clock cycle for the very reason you mention - to kill
off that offset. A second mono provides a longer pulse for externally
conected equipment.

Ken
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Ken Stone   sasami at hotkey.net.au  
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