[sdiy] Frequecy Divisor Question (TTL pulse stretcher needed)

[David Cornutt]

On Saturday, November 1, 2003, at 09:16  AM, Michael Buchstaller wrote:

>
> Goot point here. But luckily the signal goes only from the carry 
> output of one
> counter to the clock input of the next one - just a very short 
> distance. Inside the counter,
> it is kind of "refreshed" by the things the logics inside are doing to 
> the signal.
>
Oops, sorry about that.  I misread what you wrote.

Back when Gould was doing fast ECL stuff, they eventually reached
a point where they had to give up on building prototypes with any
kind of point-to-point wiring (wire wrap, etc.)  They found that if
they got it working with wire wrap, when the boards were drawn
up and stuffed they didn't work the same.  They were having to do
things like differential pairs of traces for clock lines.  I worked on
a team that designed and maintained a special board router
package that obeyed all kinds of special rules, like minimizing
corners to reduce stray induction.  A trick that the designers
used to do was to make inductors on the board itself by running
a squiggle trace of a specified length and spacing.  It came
out looking like a little potato masher on the board.