Re: [sdiy] Parallel processing clock design question

[Roman]

if it's for sound synthesis, why not use separate
XTALs and sync the micros using interrupt at sample
rate. If all communication between them happens
just after interrupt, they will be synced exactly
on instruction. Even without that in mind, at 48ksps,
micros can desync (is that a word?) no more than
1 clock cycle at 0.1% initial frequency accuracy.
Common XTALs are better than that AFAIK.

And having only 48kHz signal on whole PCB is much
easier to handle than 1000 times higher frequency.

Roman

---- Wiadomość Oryginalna ----
Od: jbv <jbv.silences at club-internet.fr>
Do: "SynthDIY" <synth-diy at dropmix.xs4all.nl>
Data: Sat, 12 Jul 2003 22:32:00 +0100
Temat: [sdiy] Parallel processing clock design question

>Hi again,
>
>Let's say I want several (2 to 5) uCs to run in
>parallel (yes, this is related to the recent thread
>"sound synthesis with uC") at high speed (40 /
>50 MHz or more).
>
>What is the best solution for clock design :
>
>1) use only 1 Xtal, which means rather long
>connections between Xtal and each uC clk
>input
>
>2) use 1 Xtal per uC, which means more parts
>and more PCB room but smaller connections
>
>3) use only 1 Xtal, but at lower freq and hook
>each uC clk input with a freq multiplier
>
>4) use another smarter solution that hasn't
>crossed my mind yet but that will be submited
>by some smart list member any time soon...
>
>Thanks in advance,
>JB
>
>
>