[sdiy] expo accuracy? or integrator accuracy?, or both?

René Schmitz uzs159 at uni-bonn.de
Fri Feb 7 16:43:49 CET 2003


At 16:13 07.02.03 +0100, Magnus Danielson wrote:
 
>> I think it is futile to concentrate on a few aspects of VCO design. 
>> You always will have to look at the whole picture so to speak.
>
>This is the point I was trying to make, you have to identify the main flaws,
>not just a few flaws and attempt to optimize them. Naturally, some flaws can
>compensate each other, but that may need carefull balancing and rarely they
>really compensate each other very good, just lowering the error over some
>range.

Exactly, thats why I wanted to stress this point again!

At some point of your optimization you might introduce other errors again. 

(Like what I said about the reset, I experimented with MOSFETs as discharge 
switches, because they have low Ron. But then I found that the opamp integrator 
I was using wasn't fast enough for the resulting reset. One would have had to 
look into leakage again for the MOSFETs, but I didn't get that far... 
The reset issue is tricky IMO, because the fastest OPAMPs have generally the 
higher bias currents. The blanket is always too short, so you have to make 
compromises. )

Or it might be that as you eliminate one error (which was previously the dominant 
error) other errors which were previously masked are uncovered. In this situation 
you are lucky, because you can focus on the next error and eliminate that.

I think an "error budged", like proposed in the Chapter on precision Design in 
The Art Of Electronics is a good method. 

Cheers,
 René



-- 
uzs159 at uni-bonn.de
http://www.uni-bonn.de/~uzs159

 




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