[sdiy] expo accuracy? or integrator accuracy?, or both?

[Magnus Danielson]

From: René Schmitz <uzs159 at uni-bonn.de>
Subject: RE: [sdiy] expo accuracy? or integrator accuracy?, or both?
Date: Fri, 07 Feb 2003 16:01:12 +0100

> At 15:32 07.02.03 +0100, you wrote:
> >Not really. CA3140 has a zener diode ESD protection network.
> >Without that you would most probably destroy the input
> >very soon. This means leakage, I have measured 30-40pA
> >at room temperature.
> 
> The CA3140 hasn't enough slewrate IMO. (Togehther with a fast 
> discharge this leads to overshooting behaviour, because the 
> integrator can't properly follow on the reset.)
> 
> >OTOH: the OPA111 (or so) is JFET, but has very low leakage
> >and good gain /bandwidth as Ian Fritz pointed out...
> 
> Still I wouldn't bother with that, as long as you use a jFET 
> as your discharge switch which has a leakage in the order of 
> 100pA.
> 
> I think it is futile to concentrate on a few aspects of VCO design. 
> You always will have to look at the whole picture so to speak.

This is the point I was trying to make, you have to identify the main flaws,
not just a few flaws and attempt to optimize them. Naturally, some flaws can
compensate each other, but that may need carefull balancing and rarely they
really compensate each other very good, just lowering the error over some
range.

I think we shall only use high temperature superconductors so we can remove the
resistance in PCB traces.... not! (Just to show how stupid optimization might
become).

Cheers,
Magnus - did YBaCuO superconductors 15 years ago...