[sdiy] RAS/CAS timing

[Theo]

If you plan to use the RAM with a uC, maybe forget the DRAMs and go static.

The CAS/RAS timing is not your main problem.
This is similar (but not the same) as the data/address bus sharing on MCS51
series uC (8052 and friends).
Some D-latches and a few gates is all it takes.

However using DRAM you need refresh timing to compensate for the build in
altsheimer syndrome.
Refresh is a process that performs dummy reads so the data is re-written in
the memory cells.
Only when your application can guarantee a large block (several kbyte) of
data is read constantly with in the maximum refresh period you may skip
refresh.
A example of this it the Atari ST where the data read out for the monitor
makes refresh un necessary.

BTW The constant recording and playback of audio in a digital delay give a
possibility to ditch the refresh
So maybe for a digital delay circuit the "dual access" DRAM structure made
with normal DRAMs in the ST could be a example of how to go.
The role of the processor and the video chip(s) can even be replaced with
counter ICs and some logic!

OTOH Princeton makes cheap and easy to CV digital delay ICs that hookup to a
DRAM without troubles.
Sound quality is "slightly better" to that of their BBD counterparts,
but "slightly better" in not a understatement...

Cheers,
Theo



----- Original Message -----
From: fmg <1984 at softhome.net>
To: <synth-diy at dropmix.xs4all.nl>
Sent: Wednesday, April 23, 2003 3:09 AM
Subject: [sdiy] RAS/CAS timing


> List
>
> A friend sent to me several 'defunct' 286 motherboards some time ago.
> This weekend I check them and found one still functioning, then I
> used this MB to check the RAMs of the others ones and found that ALL
> are working ok. I'm planing now to build a digital delay/echo for
> audio and maybe CV/ENV with them but, and thats why I'm wrinting this,
> is there any schematic that help me to achieve the goal ?  I 'google'
> for hours without lucky.
> I'm asking this cause I never built a board involving RAMs and, as I
> see in datasheets, don't want to ruin my life trying to design
> RAS/CAS/WE/Mux timings. (well, it's already ruined but don't want go
> further...)
> I know there are memory controllers that do all the job but if I
> could do with simple gates/inverters that's would be great,
> where I live trying to buy a digital IC other than 4000s are
> impossible !  (hope I'm no asking for so much)
>
> The chips are:
> 1Mb x 1b -  TMS4C1024, GM71C1000, KM41C1000 (all pin compatible)
> 256Kb x 4b -  MT4C4256, HM514256, HY534256, V53C104  (  "  )
>
> Any help appreciated
>
> Fabio Gonzalez