[sdiy] CMOS question

[Scott Gravenhorst]

My understanding of these devices is obviously
not complete.  I believe that (for at least the
N transistor) that the gate voltage needs to be
referenced to that transistor's source terminal,
which when used in logic powered by +V and ground,
is ground.  But what about the P transistor?  It 
would seem that it's gate ought to require 
reference to it's source as well, and when used in 
logic would this not be the positive rail?  This 
may not be correct, but it makes perfect sense to 
me, for now.

Recent discussions about the 4069 and 4007
have made me wonder why some of my recent designs
work at all!  Namely, my saw to tri shaper:

http://home1.GTE.NET/res0658s/electronics/saw_to_tri_converter.html

This circuit uses only the P transistors from 2 of
the inverters in a 4007 package.  I grounded the source 
and drain of one the N transistors, and leave the 
source of the other N open (due to the way the IC is 
wired internally).  The drains of the P transistors
are supplied with a varying *signal* voltage that is
always less than the positive rail.

If what I said in the first paragraph about the P
transistors is true, then I don't understand why
this circuit works, yet, I have built it and it
works!

Is there something else at work here ?

Thanks for the education so far, guys.  I see that
I have still a long way to go.

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-- Scott Gravenhorst | LegoManiac / Lego Trains / RIS 1.5
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