[sdiy] CMOS schmitt trigger question

Scott Gravenhorst music.maker at gte.net
Thu Dec 27 11:03:36 CET 2001


music.maker at gte.net wrote:
>media at mail1.nai.net wrote:
>>At 3:46 PM -0500 12/22/01, harry wrote:

>>So besides the previous exception, all the inputs should be tied.  If the
>>gate is unused, does it matter whether I tie them to Vdd or ground??
>>Should they ever be tied to Vss??
>
>It doesn't matter.  There's almost no current in the gate circuit.
>One of the transistors will always be biased on, the other off
>no matter which way you do it.  Do it whatever way is most convenient
>for your physical layout.

To clarify, in most digital logic systems, Vss will be ground.
It can, of course, be Vdd instead when the system operates 'below
ground'.  Technically, the unused gate input should be tied
either to Vdd or Vss.  As I said, one of Vss or Vdd is normally
at ground potential in a logic system.  If the CMOS gate package
is powered by a bipolar supply, say +/- 5v, then no, do not
tie an unused gate input to ground, it should be either +5 or -5.
Gates run powered this way are often (but not always) operated 
as linear amplifiers.  (recall the 4069 synth threads).  In 
any case, unused gate inputs should go to either Vss or Vdd, not
mattering which.

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